component
BSD223PH6327
Public Made by Adomby adom
Infineon Technologies MOSFETs, SOT-363. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| bsd223ph6327-etched.glb | 13d ago |
| bsd223ph6327-etched.step | 13d ago |
| bsd223ph6327-hero.glb | 13d ago |
| bsd223ph6327-hero.overlay.json | 13d ago |
| bsd223ph6327.glb | 13d ago |
| bsd223ph6327.kicad_mod | 13d ago |
| bsd223ph6327.kicad_sym | 13d ago |
| bsd223ph6327.lbr | 13d ago |
| bsd223ph6327.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
BSD223PH6327
Infineon Technologies · MOSFETs · SOT-363
BSD223PH6327 from Infineon Technologies, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Source (MOSFET1) | passive | Source terminal of the first P-channel MOSFET (MOSFET1, pins 1,2,6), part of the dual device rated VDS -20 V and ID -0.39 A. |
| 2 | Gate (MOSFET1) | input | Gate terminal of the first P-channel MOSFET (MOSFET1), with gate-source voltage limited to ±12 V (VGS). |
| 3 | Drain (MOSFET2) | passive | Drain terminal of the second P-channel MOSFET (MOSFET2, pins 3,4,5), part of the dual device rated VDS -20 V and ID -0.39 A. |
| 4 | Source (MOSFET2) | passive | Source terminal of the second P-channel MOSFET (MOSFET2, pins 3,4,5), part of the dual device rated VDS -20 V and ID -0.39 A. |
| 5 | Gate (MOSFET2) | input | Gate terminal of the second P-channel MOSFET (MOSFET2), with gate-source voltage limited to ±12 V (VGS). |
| 6 | Drain (MOSFET1) | passive | Drain terminal of the first P-channel MOSFET (MOSFET1, pins 1,2,6), part of the dual device rated VDS -20 V and ID -0.39 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous drain current, TA=25°C | ID | -0.39 | A | TA=25°C | 1 | ||
| Continuous drain current, TA=70°C | ID | -0.31 | A | TA=70°C | 1 | ||
| Pulsed drain current | ID puls | -1.56 | A | TA=25°C | 1 | ||
| Avalanche energy, single pulse | EAS | 1.4 | mJ | ID=-0.39 A, VDD=-10V, RGS=25Ω | 1 | ||
| Reverse diode dv/dt | dv/dt | -6 | kV/µs | IS=-0.39A, VDS=-16V, di/dt=200A/µs, Tjmax=150°C | 1 | ||
| Gate source voltage | VGS | -12 | 12 | V | 1 | ||
| Power dissipation | Ptot | 0.25 | W | TA=25°C | 1 | ||
| Operating and storage temperature | Tj, Tstg | -55 | 150 | °C | 1 | ||
| Thermal resistance, junction - soldering point | RthJS | 180 | K/W | 2 | |||
| Thermal resistance, junction - ambient, leaded | RthJA | 500 | K/W | 2 | |||
| Drain-source breakdown voltage | V(BR)DSS | -20 | V | VGS=0, ID=-250µA | 2 | ||
| Gate threshold voltage | VGS(th) | -0.6 | -0.9 | -1.2 | V | ID=-1.5µA, VGS=VDS | 2 |
| Zero gate voltage drain current, Tj=25°C | IDSS | -0.1 | -1 | µA | VDS=-20V, VGS=0, Tj=25°C | 2 | |
| Zero gate voltage drain current, Tj=150°C | IDSS | -10 | -100 | µA | VDS=-20V, VGS=0, Tj=150°C | 2 | |
| Gate-source leakage current | IGSS | -10 | -100 | nA | VGS=-12V, VDS=0 | 2 | |
| Drain-source on-state resistance, VGS=-2.5V | RDS(on) | 1.27 | 2.1 | Ω | VGS=-2.5V, ID=-0.29A | 2 | |
| Drain-source on-state resistance, VGS=-4.5V | RDS(on) | 0.7 | 1.2 | Ω | VGS=-4.5, ID=-0.39A | 2 | |
| Transconductance | gfs | 0.35 | 0.7 | S | VDS≥2IDRDS(on)max, ID=-0.31A | 3 | |
| Input capacitance | Ciss | 45 | 56 | pF | VGS=0, VDS=-15V, f=1MHz | 3 | |
| Output capacitance | Coss | 21 | 26 | pF | 3 | ||
| Reverse transfer capacitance | Crss | 17 | 22 | pF | 3 | ||
| Turn-on delay time | td(on) | 3.8 | 5.7 | ns | VDD=-10V, VGS=-4.5V, ID=-0.39A, RG=6Ω | 3 | |
| Rise time | tr | 5 | 7.5 | ns | 3 | ||
| Turn-off delay time | td(off) | 5.1 | 7.6 | ns | 3 | ||
| Fall time | tf | 3.2 | 4.8 | ns | 3 | ||
| Gate to source charge | Qgs | -0.04 | -0.05 | nC | VDD=-10V, ID=-0.39A | 3 | |
| Gate to drain charge | Qgd | -0.4 | -0.5 | nC | 3 | ||
| Gate charge total | Qg | -0.5 | -0.62 | nC | VDD=-10V, ID=-0.39A, VGS=0 to -4.5V | 3 | |
| Gate plateau voltage | V(plateau) | -2.2 | -2.7 | V | VDD=-10V, ID=-0.39A | 3 | |
| Inverse diode continuous forward current | IS | -0.39 | A | TA=25°C | 3 | ||
| Inverse diode direct current, pulsed | ISM | -1.56 | A | 3 | |||
| Inverse diode forward voltage | VSD | -1 | -1.33 | V | VGS=0, IF=-0.39 | 3 | |
| Reverse recovery time | trr | 7.6 | 9.5 | ns | VR=-10V, /IF/=/ID/, diF/dt=100A/µs | 3 | |
| Reverse recovery charge | Qrr | 1.1 | 1.4 | nC | 3 |
CAD (KiCad official)
- Symbol:
BSD223PH6327 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
bsd223ph6327-etched.step/bsd223ph6327-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bsd223ph6327.step/bsd223ph6327.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (9 pp, sha256
7bdd565c3daebf9d, retrieved 2026-10-20, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).