BR25G128FJ-3GE2

{
  "slug": "br25g128fj-3ge2",
  "version": "0.1.0",
  "type": "component",
  "description": "ROHM Semicon EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "memory",
    "br25g128fj-3ge2",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "br25g128fj-3ge2.kicad_sym",
    "br25g128fj-3ge2.kicad_mod",
    "br25g128fj-3ge2.glb",
    "br25g128fj-3ge2.step",
    "br25g128fj-3ge2.lbr",
    "docs/hero.png",
    "docs/br25g128fj-3ge2-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "br25g128fj-3ge2-hero.glb",
    "br25g128fj-3ge2-hero.overlay.json",
    "br25g128fj-3ge2-etched.glb"
  ],
  "component": {
    "mpn": "BR25G128FJ-3GE2",
    "manufacturer": "ROHM Semicon",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Memory",
    "subcategory": "EEPROM",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589828394084175873",
    "parts": {
      "symbol": "br25g128fj-3ge2.kicad_sym",
      "footprint": "br25g128fj-3ge2.kicad_mod",
      "model_3d": "br25g128fj-3ge2-hero.glb",
      "model_3d_plain": "br25g128fj-3ge2-etched.glb",
      "model_3d_step": "br25g128fj-3ge2-etched.step",
      "model_3d_step_plain": "br25g128fj-3ge2.step",
      "lbr": "br25g128fj-3ge2.lbr"
    },
    "distributor_links": {
      "lcsc": "C2061438",
      "digikey": "BR25G128FJ-3GE2TR-ND",
      "mouser": "755-BR25G128FJ-3GE2"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:00:55Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "BR25G128FJ-3GE2TR-ND",
        "status": "found",
        "lifecycle": "Not For New Designs"
      },
      "mouser": {
        "pn": "755-BR25G128FJ-3GE2",
        "status": "found",
        "lifecycle": "Not Recommended for New Designs"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CSB",
        "type": "input",
        "description": "Chip select input for the SPI bus, which must be driven to select the device for command communication."
      },
      {
        "number": "2",
        "name": "SO",
        "type": "output",
        "description": "Serial data output, which shifts data out MSB first on the falling edge of SCK."
      },
      {
        "number": "3",
        "name": "WPB",
        "type": "input",
        "description": "Write protect input; when asserted, the write status register command is prohibited."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "All input/output reference voltage, 0 V."
      },
      {
        "number": "5",
        "name": "SI",
        "type": "input",
        "description": "Serial input for opcode, address and serial data, sampled on the rising edge of SCK with the MSB first."
      },
      {
        "number": "6",
        "name": "SCK",
        "type": "input",
        "description": "Serial clock input, operating up to 20 MHz at 4.5 V to 5.5 V Vcc."
      },
      {
        "number": "7",
        "name": "HOLDB",
        "type": "input",
        "description": "Hold input; when asserted, command communication is suspended temporarily (HOLD status)."
      },
      {
        "number": "8",
        "name": "Vcc",
        "type": "power_in",
        "description": "Power supply input; the device operates from a single 1.6 V to 5.5 V supply."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN suffix 'FJ' is the SOP-J8 package (ordering table, page 25), not the SOP8 'F' package. The h; The pin configuration (page 5, Figure 4) is a single TOP VIEW shared by all package variants; the da; Pin 8 (Vcc) voltage range is taken from the Features section on page 1, not from page 5 where the pi"
        ],
        "pages_sent": 8,
        "cost_usd": 0.0406,
        "at": "2026-10-18T02:58:54"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589828394084175873",
        "pages": 35,
        "sha256": "5e2057154e91059f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "br25g128fj-3ge2.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "br25g128fj-3ge2-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "addf018df4f542be5df5365b9b60479aef34d18a10c2d95b897cda673723f282",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}