component
BQ7695201PFBR
Public Made by Adomby adom
Texas Instruments Battery Management, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
bq7695201pfbr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
5eca69d
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{
"slug": "bq7695201pfbr",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Battery Management, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"bq7695201pfbr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"bq7695201pfbr.kicad_sym",
"bq7695201pfbr.kicad_mod",
"bq7695201pfbr.glb",
"bq7695201pfbr.step",
"bq7695201pfbr.lbr",
"docs/hero.png",
"docs/bq7695201pfbr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"component": {
"mpn": "BQ7695201PFBR",
"manufacturer": "Texas Instruments",
"package": "TQFP-48(7x7)",
"pin_count": 48,
"category": "Power Management (PMIC)",
"subcategory": "Battery Management",
"datasheet": "https://www.ti.com/cn/lit/gpn/bq76952",
"parts": {
"symbol": "bq7695201pfbr.kicad_sym",
"footprint": "bq7695201pfbr.kicad_mod",
"model_3d": "bq7695201pfbr-etched.glb",
"model_3d_plain": "bq7695201pfbr.glb",
"model_3d_step": "bq7695201pfbr-etched.step",
"model_3d_step_plain": "bq7695201pfbr.step",
"lbr": "bq7695201pfbr.lbr"
},
"distributor_links": {
"lcsc": "C5219019"
},
"pins": [
{
"number": "1",
"name": "VC15",
"type": "input",
"description": "Sense voltage input pin for the fifteenth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "2",
"name": "VC14",
"type": "input",
"description": "Sense voltage input pin for the fourteenth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "3",
"name": "VC13",
"type": "input",
"description": "Sense voltage input pin for the thirteenth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "4",
"name": "VC12",
"type": "input",
"description": "Sense voltage input pin for the twelfth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "5",
"name": "VC11",
"type": "input",
"description": "Sense voltage input pin for the eleventh cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "6",
"name": "VC10",
"type": "input",
"description": "Sense voltage input pin for the tenth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "7",
"name": "VC9",
"type": "input",
"description": "Sense voltage input pin for the ninth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "8",
"name": "VC8",
"type": "input",
"description": "Sense voltage input pin for the eighth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "9",
"name": "VC7",
"type": "input",
"description": "Sense voltage input pin for the seventh cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "10",
"name": "VC6",
"type": "input",
"description": "Sense voltage input pin for the sixth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "11",
"name": "VC5",
"type": "input",
"description": "Sense voltage input pin for the fifth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "12",
"name": "VC4",
"type": "input",
"description": "Sense voltage input pin for the fourth cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "13",
"name": "VC3",
"type": "input",
"description": "Sense voltage input pin for the third cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "14",
"name": "VC2",
"type": "input",
"description": "Sense voltage input pin for the second cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "15",
"name": "VC1",
"type": "input",
"description": "Sense voltage input pin for the first cell from the bottom of the stack, with 2.0V to 5.5V input range recommended."
},
{
"number": "16",
"name": "VC0",
"type": "input",
"description": "Sense voltage input pin for the negative terminal of the first cell from the bottom of the stack, with -0.2V to 0.5V input range recommended."
},
{
"number": "17",
"name": "VSS",
"type": "power_in",
"description": "Device ground reference point."
},
{
"number": "18",
"name": "SRP",
"type": "input",
"description": "Analog input pin connected to the internal coulomb counter for integrating voltage between SRP and SRN, with ±0.2V input range recommended."
},
{
"number": "19",
"name": "NC",
"type": "unconnected",
"description": "This pin is not connected to silicon."
},
{
"number": "20",
"name": "SRN",
"type": "input",
"description": "Analog input pin connected to the internal coulomb counter for integrating voltage between SRP and SRN, with ±0.2V input range recommended."
},
{
"number": "21",
"name": "TS1",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as thermistor input or general-purpose ADC input, with 0 to VREG18 voltage range."
},
{
"number": "22",
"name": "TS2",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as thermistor input, wakeup from SHUTDOWN, or general-purpose ADC input, with 0 to VREG18 voltage range."
},
{
"number": "23",
"name": "TS3",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as thermistor input or general-purpose ADC input, with 0 to VREG18 voltage range."
},
{
"number": "24",
"name": "REG18",
"type": "power_out",
"description": "Internal 1.8-V LDO output for internal use only, regulated voltage with ±1.5% line regulation."
},
{
"number": "25",
"name": "ALERT",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as ALERT output, HDQ I/O, thermistor input, ADC input, or digital output, with 0 to 5.5V input range."
},
{
"number": "26",
"name": "SCL",
"type": "tri_state",
"description": "Multifunction I2C or SPI open-drain pin; can function as SCL or SPI_SCLK, with 0 to 5.5V input range."
},
{
"number": "27",
"name": "SDA",
"type": "tri_state",
"description": "Multifunction I2C or SPI open-drain pin; can function as SDA or SPI_MISO, with 0 to 5.5V input range."
},
{
"number": "28",
"name": "HDQ",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as HDQ I/O, SPI_MOSI, thermistor input, ADC input, or digital output, with 0 to VREG18 input range."
},
{
"number": "29",
"name": "CFETOFF",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as CHG FET disable, SPI_CS, thermistor input, ADC input, or digital output, with 0 to VREG18 input range."
},
{
"number": "30",
"name": "DFETOFF",
"type": "tri_state",
"description": "Multifunction pin with open-drain capability; can function as DSG FET disable, BOTHOFF, thermistor input, ADC input, or digital output, with 0 to VREG18 input range."
},
{
"number": "31",
"name": "DCHG",
"type": "tri_state",
"description": "Multifunction open-drain pin; can function as CHG fault indicator, thermistor input, ADC input, or digital output, with 0 to VREG18 input range."
},
{
"number": "32",
"name": "DDSG",
"type": "tri_state",
"description": "Multifunction open-drain pin; can function as DSG fault indicator, thermistor input, ADC input, or digital output, with 0 to VREG18 input range."
},
{
"number": "33",
"name": "RST_SHUT",
"type": "input",
"description": "Digital input pin for device reset or SHUTDOWN mode control, with 0 to 5.5V input range."
},
{
"number": "34",
"name": "REG2",
"type": "power_out",
"description": "Second programmable LDO output, configurable to 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V with up to 45mA output current."
},
{
"number": "35",
"name": "REG1",
"type": "power_out",
"description": "First programmable LDO output, configurable to 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V with up to 45mA output current."
},
{
"number": "36",
"name": "REGIN",
"type": "input",
"description": "Input pin for REG1 and REG2 LDO regulators, typically supplied with approximately 5.5V."
},
{
"number": "37",
"name": "BREG",
"type": "output",
"description": "Analog output pin providing base control signal for external preregulator transistor, with 2.5mA maximum short-circuit current."
},
{
"number": "38",
"name": "FUSE",
"type": "bidirectional",
"description": "Analog bidirectional pin for chemical fuse drive and secondary protector sensing, with VSS-0.3V to minimum(VSS+20V, VBAT+0.3V) range."
},
{
"number": "39",
"name": "PDSG",
"type": "output",
"description": "Analog output pin for predischarge PFET control, sourcing current with 30µA typical pulldown capability."
},
{
"number": "40",
"name": "PCHG",
"type": "output",
"description": "Analog output pin for precharge PFET control, sourcing current with 30µA typical pulldown capability."
},
{
"number": "41",
"name": "LD",
"type": "bidirectional",
"description": "Load detect bidirectional pin for autonomous load removal detection, with 0 to 80V output range and 35-172µA internal pullup."
},
{
"number": "42",
"name": "PACK",
"type": "input",
"description": "Pack voltage sense input pin for main pack terminal measurement, with 0 to 80V input range and ±0.5V accuracy."
},
{
"number": "43",
"name": "DSG",
"type": "output",
"description": "NMOS discharge FET gate drive output, providing high-side gate drive signal with VSS-0.3V to VSS+85V output range."
},
{
"number": "44",
"name": "NC",
"type": "unconnected",
"description": "This pin is not connected to silicon."
},
{
"number": "45",
"name": "CHG",
"type": "output",
"description": "NMOS charge FET gate drive output, providing high-side gate drive signal with VSS-0.3V to VSS+85V output range."
},
{
"number": "46",
"name": "CP1",
"type": "bidirectional",
"description": "Charge pump capacitor connection point for generating NFET gate overdrive voltage, with VSS-0.3V to minimum(VSS+85V, VBAT+15V) range."
},
{
"number": "47",
"name": "BAT",
"type": "power_in",
"description": "Primary power supply input from battery pack, with 4.7V to 80V operating range and internal 1.8V regulated supply generation."
},
{
"number": "48",
"name": "VC16",
"type": "input",
"description": "Sense voltage input pin for the sixteenth cell from the bottom of the stack and top-of-stack measurement point, with 2.0V to 5.5V input range recommended."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: BQ7695201PFBR is SPI variant with CRC enabled by default per Device Comparison Table on Page 4; veri; All 16 cell voltage inputs (VC0-VC16) require series resistors (20-100Ω) and capacitors (0.1-1µF) pe; Multifunction pins (TS1-TS3, CFETOFF, DFETOFF, ALERT, HDQ, DCHG, DDSG) require register configuratio"
],
"pages_sent": 88,
"cost_usd": 1.0392,
"at": "2026-09-24T10:44:30"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/bq76952",
"pages": 88,
"sha256": "0a51de7a50876154",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "bq7695201pfbr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "bq7695201pfbr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "b4fdaf87c84d9a0f15ef778e378bb5b07f83430d7d2315b201c6bafb80cb8d61",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}