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docs bq294532drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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bq294532drvr-etched.fit.json bq294532drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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bq294532drvr-etched.step bq294532drvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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README.md bq294532drvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

BQ294532DRVR

Texas Instruments · Battery Management · WSON-6-EP(2x2)

BQ294532DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 V3 input Sense input for the positive voltage of the third (top) cell in the stack. Analog input; connected to the cell tap through a series RIN with a CIN bypass to VSS. V3-VSS abs max 30 V; V3-V2 abs max 8 V; leakage <100 nA.
2 V2 input Sense input for the positive voltage of the second cell from the bottom of the stack. Analog input; RC-filtered from the cell tap. V2-VSS abs max 30 V; V2-V1 abs max 8 V; leakage <100 nA.
3 VSS power_in IC ground. Electrically connected to the negative terminal of the lowest cell in the stack. Must be tied to the exposed thermal PWRPAD on the PCB for proper operation.
4 V1 input Sense input for the positive voltage of the lowest (bottom) cell in the stack. Analog input; RC-filtered from the V1 cell tap. V1-VSS abs max 30 V; leakage <100 nA.
5 VDD power_in Device power supply. Recommended operating range 3 V to 25 V (abs max 30 V referenced to VSS). Typical ICC ~1 µA when all cell voltages are below the OVP threshold.
6 OUT output Overvoltage output drive intended for the gate of an external N-channel FET used in the secondary protection path. Driven high after the fixed 4 s delay when any monitored cell exceeds the 4.5 V OVP threshold. OUT-VSS abs max 30 V.
PAD PWRPAD passive Exposed thermal pad on the bottom of the SON package. Must be soldered to the PCB and connected to the VSS net for proper thermal and electrical operation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Ordering variants

Same part, different packaging or reel option.

  • BQ294532DRVR
  • BQ294532DRVRDRVT

CAD (KiCad official)

  • Symbol: BQ294532DRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: bq294532drvr-etched.step / bq294532drvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq294532drvr.step / bq294532drvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 eb0ec53937b85099, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF