component
BQ25713RSNT
Public Made by Adomby adom
Texas Instruments Battery Management, QFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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BQ25713RSNT
Texas Instruments · Battery Management · QFN-32-EP(4x4)
BQ25713RSNT from Texas Instruments, in a QFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage (recommended operating range 0 V to 24 V), and a 1 Ω and 0.47 µF (minimum) input low-pass filter is recommended. |
| 2 | ACN | input | Input current-sense resistor negative input; an R-C low-pass filter is required between the sense resistor and ACN to suppress high-frequency noise, and ACP/ACN leakage is matched. |
| 3 | ACP | input | Input current-sense resistor positive input; an R-C low-pass filter is required between the sense resistor and ACP to suppress high-frequency noise, and ACP/ACN leakage is matched. |
| 4 | CHRG_OK | output | Active-high open-drain indicator that goes high when VBUS rises above 3.5 V (after 50 ms deglitch) or falls below 24.5 V, and goes low when VBUS falls below 3.2 V or rises above 26 V; pull up through 10 kΩ. |
| 5 | OTG/VAP | input | Active-high enable for OTG or VAP mode, selected by REG0x34[5] (OTG enabled with REG0x35[4]=1 when REG0x34[5]=1; VAP enabled when REG0x34[5]=0). |
| 6 | ILIM_HIZ | input | Input current-limit programming pin set by a resistor divider with V(ILIM_HIZ) = 1 V + 40 × IDPM × RAC; the device enters high-impedance mode below 0.4 V and exits above 0.8 V. |
| 7 | VDDA | power_in | Internal reference bias pin, fed from REGN through a 10 Ω resistor and decoupled to ground with a 1 µF ceramic capacitor. |
| 8 | IADPT | output | Adapter current monitor output, V(IADPT) = 20 or 40 × (V(ACP) - V(ACN)), clamped below 3.3 V, with a resistor to ground selected per inductor (137 kΩ for 2.2 µH) and a 100 pF or smaller decoupling capacitor. |
| 9 | IBAT | output | Battery current monitor output, V(IBAT) = 8 or 16 × (V(SRP) - V(SRN)) while charging, clamped below 3.3 V, with a 100 pF or smaller decoupling capacitor, and may be left floating if unused. |
| 10 | PSYS | output | Current-mode system power monitor output proportional to total adapter and battery power, clamped below 3.3 V, with a resistor to ground to generate the voltage and an optional parallel filter capacitor, and may be left floating if unused. |
| 11 | PROCHOT | output | Active-low open-drain processor hot indicator that monitors adapter current, battery discharge current and system voltage, with the minimum pulse width programmable in REG0x23[6:3]. |
| 12 | SDA | bidirectional | I2C open-drain data I/O; connect a 10 kΩ pull-up resistor per the I2C specification, with an input-low threshold of 0.4 V and input-high threshold of 1.3 V. |
| 13 | SCL | input | I2C clock input; connect a 10 kΩ pull-up resistor per the I2C specification, with an input-low threshold of 0.4 V and input-high threshold of 1.3 V. |
| 14 | CMPIN | input | Independent comparator input compared against an internal reference (selectable 2.3 V or 1.2 V); tie to ground if the comparator is not used. |
| 15 | CMPOUT | output | Independent comparator open-drain output that requires a pull-up to a supply rail, with reference, polarity and deglitch time selectable through I2C. |
| 16 | COMP1 | input | Buck-boost converter compensation pin 1; the RC network is specified in the BQ2571X EVM schematic. |
| 17 | COMP2 | input | Buck-boost converter compensation pin 2; the RC network is specified in the BQ2571X EVM schematic. |
| 18 | CELL_BATPRESZ | input | Cell-count selection input for 1 to 4 cell configurations biased from VDDA, which also sets SYSOVP to 5 V (1S), 12 V (2S) and 19.5 V (3S/4S), and battery removal is indicated when the pin falls below VCELL_BATPRESZ_FALL (15%). |
| 19 | SRN | input | Charge-current sense resistor negative input that is also used for battery voltage sensing, with an optional 0.1 µF common-mode capacitor to ground and a 0.1 µF differential capacitor to SRP. |
| 20 | SRP | input | Charge-current sense resistor positive input, with an optional 0.1 µF common-mode capacitor to ground and a 0.1 µF differential capacitor to SRN, and SRP/SRN leakage is matched. |
| 21 | BATDRV | output | P-channel battery FET (BATFET) gate driver output that turns the BATFET off when shorted to VSYS and fully on at 10 V below VSYS, with recommended Ciss of 1 nF to 3 nF and less than 5 nF allowed. |
| 22 | VSYS | power_in | Charger system voltage sense input, where the system voltage regulation limit is programmed in REG0x05/04 and REG0x0D/0C. |
| 23 | SW2 | passive | Boost-mode high-side MOSFET driver source connection to the source of the high-side N-channel MOSFET, rated from -2 V to 24 V for operation. |
| 24 | HIDRV2 | output | Boost-mode high-side power MOSFET (Q4) driver output connected to the high-side N-channel MOSFET gate. |
| 25 | BTST2 | power_in | Boost-mode high-side driver bootstrap supply, with a 0.047 µF capacitor connected between SW2 and BTST2 and an integrated bootstrap diode from REGN. |
| 26 | LODRV2 | output | Boost-mode low-side power MOSFET (Q3) driver output connected to the low-side N-channel MOSFET gate. |
| 27 | PGND | power_in | Device power ground. |
| 28 | REGN | power_out | 6 V linear regulator output powered from VBUS or VSYS that drives the power-stage gates, requiring a 2.2 µF or 3.3 µF ceramic capacitor to ground. |
| 29 | LODRV1 | output | Buck-mode low-side power MOSFET (Q2) driver output connected to the low-side N-channel MOSFET gate. |
| 30 | BTST1 | power_in | Buck-mode high-side driver bootstrap supply, with a 0.047 µF capacitor connected between SW1 and BTST1 and an integrated bootstrap diode from REGN. |
| 31 | HIDRV1 | output | Buck-mode high-side power MOSFET (Q1) driver output connected to the high-side N-channel MOSFET gate. |
| 32 | SW1 | passive | Buck-mode high-side MOSFET driver source connection to the source of the high-side N-channel MOSFET. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-32-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
BQ25713RSNT - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: QFN-32-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq25713rsnt-etched.step/bq25713rsnt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq25713rsnt.step/bq25713rsnt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (92 pp, sha256
545440f19c8407fe, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).