component
BQ25616RTWT
Public Made by Adomby adom
Texas Instruments Battery Management ICs, WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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BQ25616RTWT
Texas Instruments · Battery Management ICs · WQFN-24-EP(4x4)
BQ25616RTWT from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VAC | power_in | Charger input voltage sensing pin; optional external ACFET connects VAC to VBUS, and the ACOV threshold is 14.2 V with UVLO below that level. |
| 2 | ACDRV | output | Charge pump output that drives an external N-channel ACFET gate with 6 V above VBUS when VAC is below the 14.2 V ACOV threshold and above UVLO; leave floating if external OVP is not used. |
| 3 | D+ | bidirectional | Positive USB data line used for D+/D- based host and charging port detection, rated up to 7 V absolute maximum. |
| 4 | D- | bidirectional | Negative USB data line used for D+/D- based host and charging port detection, rated up to 7 V absolute maximum. |
| 5 | STAT | output | Open-drain charger status output that needs a 10 kΩ pull-up to a logic rail and indicates charge in progress (LOW), charge complete or sleep (HIGH), or fault (1 Hz blink); absolute maximum sink current is 6 mA. |
| 6 | OTG | input | Boost mode enable input where a HIGH level enables boost mode, and the pin must not be left floating. |
| 7 | PG | output | Open-drain active-low power good output that needs a 10 kΩ pull-up and goes LOW for a good input between UVLO and ACOV with input current limit above 30 mA. |
| 8 | ILIM | input | Sets the input current limit IINDPM = KILIM/RILIM for an unknown adapter over an acceptable range of 500 mA to 3200 mA. |
| 9 | CE | input | Charge enable input where driving the pin LOW enables battery charging. |
| 10 | ICHG | input | Sets the charge current limit ICHG = KICHG/RICHG via a resistor to ground over an acceptable range of 300 mA to 3000 mA. |
| 11 | TS | input | Battery NTC temperature qualification input whose window is set by a resistor divider from REGN; charge and boost are suspended when TS is out of range. |
| 12 | VSET | input | Sets the default battery charge voltage by resistor to GND: float gives 4.208 V, below 500 Ω gives 4.352 V, and 5 kΩ to 25 kΩ gives 4.100 V. |
| 13 | BAT | power_in | Battery connection to the positive terminal of the battery pack, with the internal sense resistor between SYS and BAT; a 10 µF capacitor is required close to this pin. |
| 14 | BAT | power_in | Battery connection to the positive terminal of the battery pack, with the internal sense resistor between SYS and BAT; a 10 µF capacitor is required close to this pin. |
| 15 | SYS | power_out | System output connection point with the internal sense resistor between SYS and BAT; a 10 µF minimum capacitor is required close to this pin. |
| 16 | SYS | power_out | System output connection point with the internal sense resistor between SYS and BAT; a 10 µF minimum capacitor is required close to this pin. |
| 17 | GND | power_in | Power ground and signal ground for the device. |
| 18 | GND | power_in | Power ground and signal ground for the device. |
| 19 | SW | passive | Switching node connected to the output inductor and to the source of the HSFET and drain of the LSFET; a 0.047 µF bootstrap capacitor connects from SW to BTST. |
| 20 | SW | passive | Switching node connected to the output inductor and to the source of the HSFET and drain of the LSFET; a 0.047 µF bootstrap capacitor connects from SW to BTST. |
| 21 | BTST | power_in | Positive supply for the high-side driver, connected to the bootstrap diode cathode, with a 0.047 µF bootstrap capacitor from SW. |
| 22 | REGN | power_out | Low-side driver supply output connected to the bootstrap diode anode, requiring a 4.7 µF 10 V ceramic capacitor close to the IC to analog GND. |
| 23 | PMID | power_in | Connected to the drain of the RBFET and HSFET, requiring a 10 µF capacitor to GND. |
| 24 | VBUS | power_in | Charger input voltage with the internal RBFET between VBUS and PMID, requiring a 1 µF ceramic capacitor to GND placed close to the device; absolute maximum is 22 V. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x4) |
| Category | Power Supply Chip |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage VAC | -2 | 30 | V | converter not switching | 7 | ||
| Voltage VBUS | -2 | 22 | V | converter not switching | 7 | ||
| Voltage PMID | -0.3 | 22 | V | converter not switching | 7 | ||
| Voltage SW | -0.3 | 16 | V | 7 | |||
| Voltage BAT, SYS | -0.3 | 7 | V | converter not switching | 7 | ||
| Voltage BTST | -0.3 | 22 | V | 7 | |||
| Voltage ACDRV | -0.3 | 40 | V | 7 | |||
| Voltage D+, D-, STAT, OTG, PG, ILIM, CE, ICHG, TS, VSET | -0.3 | 7 | V | 7 | |||
| Output Sink Current STAT, PG | 6 | mA | 7 | ||||
| TJ Junction temperature | TJ | -40 | 150 | °C | 7 | ||
| Tstg Storage temperature | Tstg | -55 | 150 | °C | 7 | ||
| Input voltage VVBUS | VVBUS | 4 | 13.5 | V | 7 | ||
| Battery voltage VBAT | VBAT | 4.35 | V | 7 | |||
| Input current IVBUS | IVBUS | 3.2 | A | 7 | |||
| Output current (SW) ISW | ISW | 3.2 | A | 7 | |||
| Fast charging current IBAT | IBAT | 3 | A | 7 | |||
| RMS discharge current IBAT | IBAT | 6 | A | 7 | |||
| Ambient temperature TA | TA | -40 | 85 | °C | 7 | ||
| Quiescent battery current (BAT, SYS, SW) | IQ_BAT | 9.5 | 15 | µA | VBAT = 4.5V, VBUS floating or VBUS = 0V - 5V, SCL, SDA = 0V or 1.8V, TJ < 85 °C, BATFET on. | 8 | |
| VBUS operating range | VVBUS_OP | 4 | 13.5 | V | 8 | ||
| VAC rising for ACFET turnon, no battery | VVAC_UVLOZ | 3.55 | 3.85 | V | VAC rising | 8 | |
| VAC falling for ACFET turnoff, no battery | VVAC_UVLO | 3.25 | 3.55 | V | VAC falling | 8 | |
| VBUS to enable REGN | VVBUS_PRESENT | 3.65 | 3.9 | V | VBUS rising | 8 | |
| VBUS to disable REGN | VVBUS_PRESENTZ | 3.15 | 3.4 | V | VBUS falling | 8 | |
| Enter Sleep mode threshold | VSLEEP | 15 | 60 | 110 | mV | VBUS falling, VBUS - VBAT, VBAT = 4V | 8 |
| Exit Sleep mode threshold | VSLEEPZ | 115 | 220 | 340 | mV | VBUS rising, VBUS - VBAT, VBAT = 4V | 8 |
| VAC overvoltage rising threshold to turnoff ACFET and switching | VACOV | 13.5 | 14.2 | 14.85 | V | VAC rising | 8 |
| VAC overvoltage falling threshold to turnon ACFET and switching | VACOV | 13 | 13.9 | 14.5 | V | VAC falling | 8 |
| BAT depletion rising threshold to turn on BATFET | VBAT_DPLZ | 2.35 | 2.8 | V | VBAT rising | 8 | |
| BAT depletion falling threshold to turn off BATFET | VBAT_DPL | 2.18 | 2.62 | V | VBAT falling | 8 | |
| Bad adapter detection threshold | VPOORSRC | 3.75 | 3.9 | 4 | V | VBUS falling | 8 |
| Typical minimum system regulation voltage | VSYS_MIN | 3.5 | 3.65 | V | VBAT=3.2V < SYS_MIN = 3.5V, ISYS = 0A | 8 | |
| Charge voltage accuracy | VREG_ACC | 4.0836 | 4.1 | 4.1164 | V | VREG = 4.1V, RVSET=10kΩ, TJ = 0°C - 85°C | 9 |
| Charge voltage accuracy | VREG_ACC | 4.1832 | 4.2 | 4.2168 | V | VREG = 4.2V, RVSET>50kΩ, TJ = 0°C - 85°C | 9 |
| Charge voltage accuracy | VREG_ACC | 4.3326 | 4.35 | 4.3674 | V | VREG = 4.35V, RVSET<500Ω, TJ = 0°C - 85°C | 9 |
| Typical charge current regulation range | ICHG_RANGE | 0 | 3 | A | 9 | ||
| ICHG pin setting ratio | KICHG | 639 | 677 | 715 | AxΩ | ICHG=KICHG/RICHG, VBAT = 3.1V, TJ = -40°C - 85°C | 9 |
| Fast charge current regulation accuracy | ICHG_ACC | 0.516 | 0.615 | 0.715 | A | RICHG = 1100 Ω, VBAT = 3.1V or 3.8V, TJ = -40°C - 85°C | 9 |
| Fast charge current regulation accuracy | ICHG_ACC | 1.14 | 1.205 | 1.28 | A | RICHG = 562 Ω, VBAT = 3.1V or 3.8V, TJ = -40°C - 85°C | 9 |
| Fast charge current regulation accuracy | ICHG_ACC | 1.715 | 1.82 | 1.89 | A | RICHG = 372 Ω, VBAT = 3.1V or 3.8V, TJ = -40°C - 85°C | 9 |
| Battery LOWV rising threshold to start fast-charge | VBATLOWV | 3 | 3.12 | 3.24 | V | VBAT rising | 9 |
| Battery LOWV falling threshold to stop fast-charge | VBATLOWV | 2.7 | 2.8 | 2.9 | V | VBAT falling | 9 |
| Battery recharge threshold | VRECHG | 90 | 100 | 150 | mV | VBAT falling | 9 |
| Battery FET on-resistance TJ = -40°C - 85°C | RON_BATFET | 19.5 | 26 | mΩ | TJ = -40°C - 85°C | 10 | |
| Battery FET on-resistance TJ = -40°C - 125°C | RON_BATFET | 19.5 | 30 | mΩ | TJ = -40°C - 125°C | 10 | |
| Battery overvoltage rising threshold | VBAT_OVP | 103 | 104 | 105 | % | VBAT rising, as percentage of VREG | 10 |
| Battery overvoltage falling threshold | VBAT_OVP | 101 | 102 | 103 | % | VBAT falling, as percentage of VREG | 10 |
| Typical input voltage regulation accuracy | VINDPM_ACC | 4.171 | 4.3 | 4.429 | V | 10 | |
| VINDPM threshold to track battery voltage | VINDPM_TRACK | 4.45 | 4.55 | 4.74 | V | VBAT = 4.35V | 10 |
| Input current regulation accuracy | IINDPM_ACC | 450 | 465 | 500 | mA | IINDPM = 500mA (TJ=-40°C - 85°C) | 10 |
| Input current regulation accuracy | IINDPM_ACC | 750 | 835 | 900 | mA | IINDPM = 900mA (TJ=-40°C-85°C) | 10 |
| Input current regulation accuracy | IINDPM_ACC | 1300 | 1390 | 1500 | mA | IINDPM = 1500mA (TJ=-40°C-85°C) | 10 |
| ILIM pin setting ratio | KILIM | 459 | 478 | 500 | A x Ω | 10 | |
| RθJA Junction-to-ambient thermal resistance (JEDEC) | RθJA | 31.9 | °C/W | 7 | |||
| RθJC(top) Junction-to-case (top) thermal resistance | RθJC(top) | 27 | °C/W | 7 | |||
| RθJB Junction-to-board thermal resistance | RθJB | 9.2 | °C/W | 7 | |||
| ΨJT Junction-to-top characterization parameter | ΨJT | 0.4 | °C/W | 7 | |||
| ΨJB Junction-to-board characterization parameter | ΨJB | 9.2 | °C/W | 7 | |||
| RθJC(bot) Junction-to-case (bottom) thermal resistance | RθJC(bot) | 2.8 | °C/W | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 1. Place an input capacitor as close as possible to the PMID pin and GND pin connections and use the shortest copper trace connection or GND plane. Add a 1-nF small size (such as 0402 or 0201) decoupl | 38 |
CAD (KiCad official)
- Symbol:
BQ25616RTWT - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq25616rtwt-etched.step/bq25616rtwt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq25616rtwt.step/bq25616rtwt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
9c125bb15fce80e0, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).