component

BQ24735RGRR

Public Made by Adom

by adom

Texas Instruments Battery Management, VQFN-20(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)bq24735rgrrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs bq24735rgrr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers bq24735rgrr: viewers · Ray 4d ago
bq24735rgrr-etched.fit.json bq24735rgrr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
bq24735rgrr-etched.glb bq24735rgrr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
bq24735rgrr-etched.step bq24735rgrr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
bq24735rgrr.glb Publish 0.1.0 · Ray 4d ago
bq24735rgrr.kicad_mod Publish 0.1.0 · Ray 4d ago
bq24735rgrr.kicad_sym Publish 0.1.0 · Ray 4d ago
bq24735rgrr.lbr Publish 0.1.0 · Ray 4d ago
bq24735rgrr.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/bq24735rgrr · Ray 4d ago

BQ24735RGRR

Texas Instruments · Battery Management · VQFN-20(3.5x3.5)

BQ24735RGRR from Texas Instruments, in a VQFN-20(3.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ACN input Input current sense resistor negative input; place an optional 0.1µF ceramic capacitor from ACN to GND for common-mode filtering and a 0.1µF ceramic capacitor from ACN to ACP for differential-mode filtering; common-mode range 4.5V to 24V.
2 ACP input Input current sense resistor positive input; place a 0.1µF ceramic capacitor from ACP to GND for common-mode filtering and a 0.1µF ceramic capacitor from ACN to ACP for differential-mode filtering; common-mode range 4.5V to 24V.
3 CMSRC input ACDRV charge pump source input; connect to the common source of ACFET (Q1) and RBFET (Q2) through a 4kΩ series resistor to limit in-rush current; sets the reference for the 6V ACDRV gate overdrive.
4 ACDRV output Charge pump output driving the adapter NMOS selector (ACFET) and reverse-blocking NMOS (RBFET); outputs VCMSRC + 6V when ACDET is 2.4V-3.15V and VCC is above UVLO; place a 4kΩ series resistor to limit in-rush current; minimum load resistance 500kΩ, turn-off resistance 5kΩ-7.4kΩ.
5 ACOK tri_state AC adapter detection open-drain output; pulled HIGH by external pull-up when ACDET is 2.4V-3.15V, VCC > UVLO, and VCC is ≥275mV above SRN; pulled LOW internally otherwise; ACOK rising deglitch 150ms (first insertion) or 1.3s (default subsequent); output saturation voltage ≤500mV at 5mA.
6 ACDET input Adapter detection analog input; program the valid adapter threshold with an external resistor divider from adapter input to GND; ACOK rising threshold 2.4V, ACOVP threshold 3.15V; when above 0.6V and VCC > UVLO, REGN LDO, ACOK comparator, and IOUT become active.
7 IOUT output Buffered current sense amplifier output selectable between adapter current (ACP-ACN) or charge current (SRP-SRN) via SMBus ChargeOption() bit[5]; output equals 20× the differential sense voltage; output range 0V-3.3V, max output current 1mA, max load capacitance 100pF.
8 SDA bidirectional SMBus open-drain data I/O; connect to SMBus data line with a 10kΩ pull-up resistor; input low threshold 0.8V, input high threshold 2.1V; output saturation voltage ≤500mV at 5mA; supports 10kHz-100kHz clock.
9 SCL input SMBus open-drain clock input; connect to SMBus clock line with a 10kΩ pull-up resistor; input low threshold 0.8V, input high threshold 2.1V; supports 10kHz-100kHz clock frequency.
10 ILIM input Charge current limit analog input; program with a resistor divider from 3.3V rail to GND; the lower of ILIM or the charge current DAC sets the regulation limit; charge disabled when VILIM < 75mV (CE falling threshold), charge enabled when VILIM > 105mV (CE rising threshold); to disable ILIM control pull above 1.6V.
11 BATDRV output Charge pump output driving the battery-to-system NMOS (BATFET); outputs VSRN + 6V to turn on BATFET and VSRN to turn off BATFET; charge pump current limit 40µA-60µA; place a 4kΩ series resistor to limit in-rush current; minimum load resistance 500kΩ.
12 SRN input Charge current sense resistor negative input and battery voltage sense; connect through a 7.5Ω series resistor then to GND via 0.1µF for common-mode filtering and across sense resistor via 0.1µF for differential filtering; output common-mode range 0V-19.2V.
13 SRP input Charge current sense resistor positive input; connect through a 10Ω series resistor to the sense resistor; place a 0.1µF capacitor between SRP and SRN for differential filtering; SRP capacitance must not exceed 0.1µF for correct cycle-by-cycle OCP detection.
14 GND power_in IC analog ground; on PCB connect to analog ground plane and connect to power ground plane only through the exposed PowerPad beneath the IC.
15 LODRV output Low-side synchronous power MOSFET gate driver output; connect to low-side n-channel MOSFET gate; turn-on resistance 7.5Ω typ / 12Ω max at VREGN = 6V, 10mA; turn-off resistance 0.9Ω typ / 1.4Ω max; dead time from high side to low side 20ns.
16 REGN power_out Internal 6V linear regulator output supplied from VCC; regulates to 5.5V-6.5V when VCC > 6.5V and ACDET > 0.6V; current limit 50mA typ (75mA max) during charge; connect a 1µF ceramic capacitor to GND for stability.
17 BTST passive High-side MOSFET gate driver bootstrap supply; connect a 0.047µF ceramic capacitor from BTST to PHASE and an external Schottky bootstrap diode from REGN to BTST; a low-side refresh pulse is triggered when VBTST-VPHASE falls below 4.3V typ.
18 HIDRV output High-side synchronous power MOSFET gate driver output; connect to high-side n-channel MOSFET gate; turn-on resistance 6Ω typ / 10Ω max at VBTST-VPHASE = 5.5V, 10mA; turn-off resistance 0.65Ω typ / 1.3Ω max; dead time from low side to high side 20ns.
19 PHASE passive High-side MOSFET driver source and PWM switching node; connect to the source of the high-side n-channel MOSFET; voltage range −2V to 24V (recommended operating); low-side short-circuit protection monitored between PHASE and GND.
20 VCC power_in Input supply pin; diode-OR connection from AC adapter or battery; operating range 4.5V to 24V; UVLO rising threshold 3.5V-4V, falling hysteresis 340mV; use a 10Ω resistor and 1µF capacitor to GND as a low-pass filter to limit inrush current.
21 PowerPAD power_in Exposed thermal and ground pad beneath the IC; analog ground and power ground are star-connected at this pad; must always be soldered to the PCB with thermal vias to analog and power ground planes; θJCbot = 4.4°C/W.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-20(3.5x3.5)
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: BQ24735RGRR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm
  • 3D model: VQFN-20(3.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: bq24735rgrr-etched.step / bq24735rgrr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq24735rgrr.step / bq24735rgrr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 49d4e7a43dd79779, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF