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BD63860EFV-E2

ROHM Semicon · Stepper Motor Driver · HTSSOP-28-EP

BD63860EFV-E2 from ROHM Semicon, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RNF1 passive Output current-sense resistor connection for channel 1; sense resistor allowable 0.1 Ω to 0.4 Ω and RNF pin maximum voltage 1.0 V.
2 N.C. unconnected No connection; no function assigned in the datasheet.
3 CW/CCW input Sets motor rotation direction: L = clockwise, H = counterclockwise; logic input with H 2.0 V to 5.5 V and L 0 V to 0.8 V.
4 OUT1A output H-bridge channel 1 output A to the motor; maximum output current 2.5 A per phase and ON-resistance 1.0 Ω max (total top and bottom FET at 1.5 A).
5 MTH input Sets the current decay ratio; input voltage range 0 V to 3.5 V.
6 CR1 passive PWM frequency RC connection; allowable C is 470 pF to 4700 pF and R is 10 kΩ to 100 kΩ.
7 GND power_in Ground terminal; must be the lowest potential in the system under all operating conditions.
8 VREF power_in Sets the output current value; input voltage range 0 V to 3.2 V.
9 CR2 passive PWM frequency RC connection; allowable C is 470 pF to 4700 pF and R is 10 kΩ to 100 kΩ.
10 VCR input Sets the decay mode; input voltage range 3.0 V to 5.5 V.
11 OUT2A output H-bridge channel 2 output A to the motor; maximum output current 2.5 A per phase.
12 MODE2 input Motor excitation mode select (with MODE1: full, half A, quarter or eighth step); logic input with H 2.0 V to 5.5 V and L 0 V to 0.8 V.
13 MODE1 input Motor excitation mode select (with MODE2: full, half A, quarter or eighth step); logic input with H 2.0 V to 5.5 V and L 0 V to 0.8 V.
14 RNF2 passive Output current-sense resistor connection for channel 2; sense resistor allowable 0.1 Ω to 0.4 Ω and RNF pin maximum voltage 1.0 V.
15 VCC2 power_in Motor supply for channel 2; operating range 16 V to 28 V with absolute maximum 36 V, must be shorted to VCC1 and bypassed to GND.
16 SR input Logic control input (H 2.0 V to 5.5 V, L 0 V to 0.8 V) listed with the control inputs; its function is not described in the provided text.
17 RESET input Reset terminal; logic control input (H 2.0 V to 5.5 V, L 0 V to 0.8 V) whose reset action is not described in the provided text.
18 OUT2B output H-bridge channel 2 output B to the motor; maximum output current 2.5 A per phase.
19 CLK input Clock input; each rising edge advances the output electrical angle by one step, and excessive noise on this pin may cause motor misstep.
20 TEST input Test terminal; connect to GND during normal operation.
21 GND power_in Ground terminal; must be the lowest potential in the system under all operating conditions.
22 N.C. unconnected No connection; no function assigned in the datasheet.
23 N.C. unconnected No connection; no function assigned in the datasheet.
24 N.C. unconnected No connection; no function assigned in the datasheet.
25 OUT1B output H-bridge channel 1 output B to the motor; maximum output current 2.5 A per phase.
26 ENABLE input Output enable: L = outputs active, H = outputs forced open with electrical angle maintained; logic input with H 2.0 V to 5.5 V and L 0 V to 0.8 V.
27 PS input Power save: L = standby (outputs open, translator reset to 45° default), H = active; standby-to-active delay up to 40 µs.
28 VCC1 power_in Motor supply for channel 1; operating range 16 V to 28 V with absolute maximum 36 V, bypass with 47 µF to 470 µF electrolytic and 0.01 µF to 0.1 µF ceramic.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package HTSSOP-28-EP
Category Motor Driver ICs
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Circuit current at standby ICCST 0.4 2 mA PS = L 2
Circuit current ICC 4 7 mA PS = H, VREF = 2 V 2
H level input voltage VINH 2 5.5 V 2
L level input voltage VINL 0 0.8 V 2
H level input current IINH 38 55 94 µA VIN = 5.5 V 2
L level input current IINL -10 0 µA VIN = 0 V 2
Output ON-resistance RON 0.8 1 Ω IOUT = 1.5 A, total across top and bottom FET 2
Output leak current ILEAK 10 µA 2
RNF input current IRNF -40 -20 µA RNF = 0 V 2
VREF input current IVREF -2 -0.1 µA VREF = 0 V 2
VREF input voltage range VREF 0 3.2 V 2
VCR input current IVCR 60 100 140 µA VVCR = 3.3 V 2
VCR input voltage range VVCR 3 5.5 V 2
MTH input current IMTH -2 -0.1 µA MTH = 0 V 2
MTH input voltage range VMTH 0 3.5 V 2
Comparator threshold 1 VCTH1 0.212 0.25 0.288 V VREF = 2 V, 100% 2
Comparator threshold 2 VCTH2 0.142 0.177 0.212 V VREF = 2 V, 70.71% 2
Comparator threshold 3 VCTH3 0.076 0.096 0.116 V VREF = 2 V, 38.27% 2
Minimum on time tONMIN 0.21 0.54 0.92 µs R = 39 kΩ, C = 1000 pF 2
Supply voltage VCC1,2 16 24 28 V Ta = -25 to 85 °C 2
Output current (DC) IOUT 1.5 1.7 A/phase Not to exceed Pd, ASO (footnote *4) 2
Supply voltage VCC1,2 -0.2 36 V 2
Control pin input voltage VIN -0.2 7 V 2
RNF maximum voltage VRNF 1 V 2
Maximum output current IOUT 2.5 A/phase Not to exceed Pd, ASO and Tjmax = 150 °C (footnote *3) 2
Power dissipation Pd 1.45 W IC mounted on 70 mm x 70 mm x 1.6 mm glass-epoxy board; derated at 11.6 mW/°C above Ta = 25 °C (footnote *1) 2
Power dissipation Pd 4.7 W IC mounted on 4-layer recommended board; derated at 37.6 mW/°C above Ta = 25 °C (footnote *2) 2
Operating temperature range Topr -25 85 °C 2
Storage temperature range Tstg -55 150 °C 2
Junction temperature Tjmax 150 °C 2
Thermal resistance, junction to ambient (Board 1) θja 86.2 °C/W Board 1: 1-layer board (no copper foil on backside), 70 mm x 70 mm x 1.6 mm, heat slag soldered to PCB 6
Thermal resistance, junction to ambient (Board 2) θja 67.5 °C/W Board 2: 2-layer board (15 x 15 mm² copper foil on backside), heat slag soldered to PCB 6
Thermal resistance, junction to ambient (Board 3) θja 37.8 °C/W Board 3: 2-layer board (70 x 70 mm² copper foil on backside), heat slag soldered to PCB 6
Thermal resistance, junction to ambient (Board 4) θja 26.6 °C/W Board 4: 4-layer board (70 x 70 mm² copper foil on backside), heat slag soldered to PCB 6

CAD (KiCad official)

  • Symbol: BD63860EFV-E2
  • Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
  • 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
  • 3D model files: bd63860efv-e2-etched.step / bd63860efv-e2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bd63860efv-e2.step / bd63860efv-e2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (11 pp, sha256 4880297ce7be5201, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF