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docs az432antr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers az432antr-tp: viewers · Ray
az432antr-tp-etched.fit.json az432antr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
az432antr-tp-etched.glb az432antr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
az432antr-tp-etched.step az432antr-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
az432antr-tp.glb Publish 0.1.0 · Ray
az432antr-tp.kicad_mod Publish 0.1.0 · Ray
az432antr-tp.kicad_sym Publish 0.1.0 · Ray
az432antr-tp.lbr Publish 0.1.0 · Ray
az432antr-tp.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
page.json az432antr-tp: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md az432antr-tp: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

AZ432ANTR-TP

TECH PUBLIC · Voltage Reference · SOT-23

AZ432ANTR-TP from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input pin. Internal error amplifier compares this pin against the internal 1.25 V bandgap; the cathode sinks current to regulate REF to Vref. Typical reference input current 0.4 uA (max 1.0 uA); reference input current range up to 1 uA absolute maximum.
2 K power_in Cathode pin. Shunt regulator current-sink terminal; VKA absolute maximum 18 V, continuous cathode current up to 100 mA, minimum cathode current for regulation ~30 uA (typ). Dynamic impedance ~0.15 Ω typ at IK = 0.1 mA to 20 mA.
3 A power_in Anode pin. Ground/return terminal for the shunt regulator; all voltage values in the datasheet are referenced to this pin.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category PMIC
Pins 3

Ordering variants

  • AZ432ANTR-TP

CAD (KiCad official)

  • Symbol: AZ432ANTR-TP
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: az432antr-tp-etched.step / az432antr-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); az432antr-tp.step / az432antr-tp.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
az432antr-tp.step 59 KB You want the bare part, or you mark your own boards.
az432antr-tp-etched.step 1.6 MB You want the part with AZ432ANTR-TP already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 419 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 a2359883533014ff, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF