AVR128DB48-I/PT

{
  "slug": "avr128db48-i-pt",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Pre-ordered MCUs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "avr128db48-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "avr128db48-i-pt.kicad_sym",
    "avr128db48-i-pt.kicad_mod",
    "avr128db48-i-pt.glb",
    "avr128db48-i-pt.step",
    "avr128db48-i-pt.lbr",
    "docs/hero.png",
    "docs/avr128db48-i-pt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "avr128db48-i-pt-hero.glb",
    "avr128db48-i-pt-hero.overlay.json"
  ],
  "component": {
    "mpn": "AVR128DB48-I/PT",
    "manufacturer": "Microchip Tech",
    "package": "TQFP-48(7x7)",
    "pin_count": 48,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Pre-ordered MCUs",
    "datasheet": "https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ProductDocuments/DataSheets/AVR128DB28-32-48-64-DataSheet-DS40002247.pdf",
    "parts": {
      "symbol": "avr128db48-i-pt.kicad_sym",
      "footprint": "avr128db48-i-pt.kicad_mod",
      "model_3d": "avr128db48-i-pt-hero.glb",
      "model_3d_plain": "avr128db48-i-pt.glb",
      "model_3d_step": "avr128db48-i-pt-etched.step",
      "model_3d_step_plain": "avr128db48-i-pt.step",
      "lbr": "avr128db48-i-pt.lbr"
    },
    "distributor_links": {
      "lcsc": "C1019766",
      "digikey": "150-AVR128DB48-I/PT-ND",
      "mouser": "579-AVR128DB48-I/PT"
    },
    "distributor_check": {
      "checked_at": "2026-11-13T16:34:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "150-AVR128DB48-I/PT-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "579-AVR128DB48-I/PT",
        "status": "found"
      },
      "matched_as": "AVR128DB48-I/PT"
    },
    "pins": [
      {
        "number": "1",
        "name": "PA5",
        "type": "bidirectional",
        "description": "PORTA general-purpose I/O pin 5, with alternate positions for USART0 RxD, SPI0 MISO and TCA0 WO5, and TCD0 WOB."
      },
      {
        "number": "2",
        "name": "PA6",
        "type": "bidirectional",
        "description": "PORTA general-purpose I/O pin 6, with alternate positions for USART0 XCK, SPI0 SCK, TCD0 WOC and CCL OUT."
      },
      {
        "number": "3",
        "name": "PA7",
        "type": "bidirectional",
        "description": "PORTA general-purpose I/O pin 7, which carries CLKOUT and the default ZCD0/1/2 OUT position, with SPI0 SS and TCD0 WOD as further functions."
      },
      {
        "number": "4",
        "name": "PB0",
        "type": "bidirectional",
        "description": "PORTB general-purpose I/O pin 0, powered from the VDDIO2 domain, with alternate positions for USART3 TxD, TCA0 WO0 and CCL LUT4 IN0."
      },
      {
        "number": "5",
        "name": "PB1",
        "type": "bidirectional",
        "description": "PORTB general-purpose I/O pin 1, powered from the VDDIO2 domain, with alternate positions for USART3 RxD, TCA0 WO1 and CCL LUT4 IN1."
      },
      {
        "number": "6",
        "name": "PB2",
        "type": "bidirectional",
        "description": "PORTB general-purpose I/O pin 2, powered from the VDDIO2 domain, with alternate positions for USART3 XCK, TWI0 SDA, TCA0 WO2 and EVSYS EVOUTB."
      },
      {
        "number": "7",
        "name": "PB3",
        "type": "bidirectional",
        "description": "PORTB general-purpose I/O pin 3, powered from the VDDIO2 domain, with alternate positions for USART3 XDIR, TWI0 SCL, TCA0 WO3 and CCL LUT4 OUT."
      },
      {
        "number": "8",
        "name": "PB4",
        "type": "bidirectional",
        "description": "PORTB general-purpose I/O pin 4, powered from the VDDIO2 domain, with alternate positions for USART3 TxD, SPI0 MOSI and TCA0 WO4."
      },
      {
        "number": "9",
        "name": "PB5",
        "type": "bidirectional",
        "description": "PORTB general-purpose I/O pin 5, powered from the VDDIO2 domain, with alternate positions for USART3 RxD, SPI0 MISO and TCA0 WO5."
      },
      {
        "number": "10",
        "name": "PC0",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 0 (MVIO, powered from VDDIO2), with alternate positions for USART1 TxD, SPI0 MOSI, TCA0 WO0 and CCL LUT1 IN0."
      },
      {
        "number": "11",
        "name": "PC1",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 1 (MVIO, powered from VDDIO2), with alternate positions for USART1 RxD, SPI0 MISO, TCA0 WO1 and CCL LUT1 IN1."
      },
      {
        "number": "12",
        "name": "PC2",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 2 (MVIO, powered from VDDIO2), supporting TWI Fm+ with USART1 XCK, SPI0 SCK, TCA0 WO2 and EVSYS EVOUTC."
      },
      {
        "number": "13",
        "name": "PC3",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 3 (MVIO, powered from VDDIO2), supporting TWI Fm+ with USART1 XDIR, SPI0 SS, TCA0 WO3 and CCL LUT1 OUT."
      },
      {
        "number": "14",
        "name": "VDDIO2",
        "type": "power_in",
        "description": "Supply for the MVIO-capable I/O pins; in dual-supply mode it may differ from VDD, and in single-supply mode it must be connected to VDD."
      },
      {
        "number": "15",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin common to the VDD, AVDD and VDDIO2 supplies."
      },
      {
        "number": "16",
        "name": "PC4",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 4 (MVIO, powered from VDDIO2), with alternate positions for USART1 TxD, SPI0 MOSI and TCA0 WO4."
      },
      {
        "number": "17",
        "name": "PC5",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 5 (MVIO, powered from VDDIO2), with alternate positions for USART1 RxD, SPI0 MISO and TCA0 WO5."
      },
      {
        "number": "18",
        "name": "PC6",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 6 (MVIO, powered from VDDIO2), with alternate positions for USART1 XCK, SPI0 SCK, TWI0 SDA (client) and TCA0 WO2."
      },
      {
        "number": "19",
        "name": "PC7",
        "type": "bidirectional",
        "description": "PORTC multi-voltage I/O pin 7 (MVIO, powered from VDDIO2), with alternate positions for USART1 XDIR, SPI0 SS, TWI0 SCL (client) and EVSYS EVOUTC."
      },
      {
        "number": "20",
        "name": "PD0",
        "type": "bidirectional",
        "description": "PORTD I/O pin 0 that serves ADC0 input AIN0 and the negative input AINN1 of the analog comparators, with TCD0 WOA and CCL LUT2 IN0 as further functions."
      },
      {
        "number": "21",
        "name": "PD1",
        "type": "bidirectional",
        "description": "PORTD I/O pin 1 that serves ADC0 input AIN1, op amp 0 positive input (OP0 INP) and ZCD0 input (ZCIN), with CCL LUT2 IN1 as a further function."
      },
      {
        "number": "22",
        "name": "PD2",
        "type": "bidirectional",
        "description": "PORTD I/O pin 2 that serves ADC0 input AIN2, analog comparator positive input AINP0, op amp 0 output (OP0 OUT), with EVSYS EVOUTD and CCL LUT2 IN2 as further functions."
      },
      {
        "number": "23",
        "name": "PD3",
        "type": "bidirectional",
        "description": "PORTD I/O pin 3 that serves ADC0 input AIN3, analog comparator negative input AINN0 and op amp 0 negative input (OP0 INN), with CCL LUT2 OUT as a further function."
      },
      {
        "number": "24",
        "name": "PD4",
        "type": "bidirectional",
        "description": "PORTD I/O pin 4 that serves ADC0 input AIN4, analog comparator positive input AINP2 and op amp 1 positive input (OP1 INP)."
      },
      {
        "number": "25",
        "name": "PD5",
        "type": "bidirectional",
        "description": "PORTD I/O pin 5 that serves ADC0 input AIN5, analog comparator negative input AINN0 and op amp 1 output (OP1 OUT)."
      },
      {
        "number": "26",
        "name": "PD6",
        "type": "bidirectional",
        "description": "PORTD I/O pin 6 that serves ADC0 input AIN6, analog comparator positive input AINP3 and the analog comparator output path, with EVSYS and CCL alternates per the multiplexing table."
      },
      {
        "number": "27",
        "name": "PD7",
        "type": "bidirectional",
        "description": "PORTD I/O pin 7 that also serves as the external voltage reference input VREFA, with ADC0 input AIN7, op amp 1 negative input (OP1 INN) and EVSYS EVOUTD (alternate) as further functions."
      },
      {
        "number": "28",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply pin that powers the I/O lines, the external 32.768 kHz oscillator XOSC32K and the analog peripherals; it must be at the same voltage as VDD because AVDD is internally connected to VDD."
      },
      {
        "number": "29",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground pin listed as AGND in the multiplexing table; the datasheet states that all ground pins are common to VDD, AVDD and VDDIO2."
      },
      {
        "number": "30",
        "name": "PE0",
        "type": "bidirectional",
        "description": "PORTE I/O pin 0 that serves ADC0 input AIN8 and analog comparator positive input AINP1, with USART4 TxD, SPI0 MOSI (alternate) and TCA0 WO0 (alternate) as further functions."
      },
      {
        "number": "31",
        "name": "PE1",
        "type": "bidirectional",
        "description": "PORTE I/O pin 1 that serves ADC0 input AIN9 and op amp 2 positive input (OP2 INP), with USART4 RxD, SPI0 MISO (alternate) and TCA0 WO1 (alternate) as further functions."
      },
      {
        "number": "32",
        "name": "PE2",
        "type": "bidirectional",
        "description": "PORTE I/O pin 2 that serves ADC0 input AIN10, analog comparator positive input AINP2 and op amp 2 output (OP2 OUT), with USART4 XCK, SPI0 SCK (alternate) and EVSYS EVOUTE as further functions."
      },
      {
        "number": "33",
        "name": "PE3",
        "type": "bidirectional",
        "description": "PORTE I/O pin 3 that serves ADC0 input AIN11, op amp 2 negative input (OP2 INN) and ZCD1 input (ZCIN), with USART4 XDIR and SPI0 SS (alternate) as further functions."
      },
      {
        "number": "34",
        "name": "PF0",
        "type": "bidirectional",
        "description": "PORTF I/O pin 0 that is the 32.768 kHz crystal pin XTAL32K1 and ADC0 input AIN16, which cannot be used as a negative differential ADC input; USART2 TxD is an alternate function."
      },
      {
        "number": "35",
        "name": "PF1",
        "type": "bidirectional",
        "description": "PORTF I/O pin 1 that is the 32.768 kHz crystal pin XTAL32K2 and ADC0 input AIN17, which cannot be used as a negative differential ADC input; USART2 RxD is an alternate function."
      },
      {
        "number": "36",
        "name": "PF2",
        "type": "bidirectional",
        "description": "PORTF I/O pin 2, powered from the VDDIO2 domain, that supports TWI Fm+ and ADC0 input AIN18 (not usable as negative differential input), with USART2 XCK, TCD0 WOC and EVSYS EVOUTF as further functions."
      },
      {
        "number": "37",
        "name": "PF3",
        "type": "bidirectional",
        "description": "PORTF I/O pin 3, powered from the VDDIO2 domain, that supports TWI Fm+ and ADC0 input AIN19 (not usable as negative differential input), with USART2 XDIR, TCD0 WOD and CCL LUT3 OUT as further functions."
      },
      {
        "number": "38",
        "name": "PF4",
        "type": "bidirectional",
        "description": "PORTF I/O pin 4, powered from the VDDIO2 domain, that serves ADC0 input AIN20 (not usable as negative differential input), with USART2 TxD (alternate) and TCA0 WO4 (alternate) as further functions."
      },
      {
        "number": "39",
        "name": "PF5",
        "type": "bidirectional",
        "description": "PORTF I/O pin 5, powered from the VDDIO2 domain, that serves ADC0 input AIN21 (not usable as negative differential input), with USART2 RxD (alternate) and TCA0 WO5 (alternate) as further functions."
      },
      {
        "number": "40",
        "name": "PF6",
        "type": "input",
        "description": "Input-only pin PF6 that is the RESET pin; when enabled by the RSTPINCFG fuse it is an external reset input with pull-up enabled on PF6."
      },
      {
        "number": "41",
        "name": "UPDI",
        "type": "bidirectional",
        "description": "Dedicated Unified Program and Debug Interface pin used for one-wire UART programming and debugging, with no other function."
      },
      {
        "number": "42",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin that powers the I/O lines, XOSCHF and the internal voltage regulator; the same voltage must be applied to all VDD and AVDD pins."
      },
      {
        "number": "43",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin common to the VDD, AVDD and VDDIO2 supplies."
      },
      {
        "number": "44",
        "name": "PA0",
        "type": "bidirectional",
        "description": "PORTA I/O pin 0 that is the XTALHF1 external high-frequency crystal pin, with EXTCLK input, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0 as further functions."
      },
      {
        "number": "45",
        "name": "PA1",
        "type": "bidirectional",
        "description": "PORTA I/O pin 1 that is the XTALHF2 external high-frequency crystal pin, with USART0 RxD, TCA0 WO1 and CCL LUT0 IN1 as further functions."
      },
      {
        "number": "46",
        "name": "PA2",
        "type": "bidirectional",
        "description": "PORTA I/O pin 2 that supports TWI Fm+ (SDA), with USART0 XCK, TCA0 WO2, EVSYS EVOUTA and CCL LUT0 IN2 as further functions."
      },
      {
        "number": "47",
        "name": "PA3",
        "type": "bidirectional",
        "description": "PORTA I/O pin 3 that supports TWI Fm+ (SCL), with USART0 XDIR, TCA0 WO3 and CCL LUT1 OUT as further functions."
      },
      {
        "number": "48",
        "name": "PA4",
        "type": "bidirectional",
        "description": "PORTA I/O pin 4 with alternate positions for USART0 TxD, SPI0 MOSI, TCA0 WO4 and TCD0 WOA."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-number-to-name mapping was taken from the 48-pin column of the I/O multiplexing table (secti; The table lists pin 29 as AGND, but the figure text on page 16 lists GND entries near AVDD and pin 4; Alternate-function lists are abbreviated from the multiplexing table, which uses superscripts and al",
          "4/48 pins cited to the wrong page (name found elsewhere): ['14:VDDIO2@p27', '15:GND@p27', '42:VDD@p27', '43:GND@p27']"
        ],
        "pages_sent": 122,
        "cost_usd": 0.4388,
        "at": "2026-11-13T16:33:52"
      },
      "datasheet": {
        "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ProductDocuments/DataSheets/AVR128DB28-32-48-64-DataSheet-DS40002247.pdf",
        "pages": 730,
        "sha256": "0d66ae71ca5ec7cc",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "avr128db48-i-pt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",
        "checked": "2026-11-13",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "avr128db48-i-pt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "56c784b6499a389b1bdec86e74c5c82aa0cfabdb0f3e97938b22a9918b662244",
        "checked": "2026-11-13",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "PT",
      "source_page": 712,
      "D": {
        "nom_mm": 7.0,
        "range_mm": [
          null,
          null
        ]
      },
      "E1": {
        "nom_mm": 7.0,
        "range_mm": [
          null,
          null
        ]
      },
      "E": {
        "nom_mm": 9.0,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.2,
        "range_mm": [
          null,
          1.2
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "avr128db48-i-pt.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}