main
Ray Publish 0.1.0 c48340e 9d ago
{
  "slug": "attiny814-ssf",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "attiny814-ssf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "attiny814-ssf.kicad_sym",
    "attiny814-ssf.kicad_mod",
    "attiny814-ssf.glb",
    "attiny814-ssf.step",
    "attiny814-ssf.lbr",
    "docs/hero.png",
    "docs/attiny814-ssf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "attiny814-ssf-hero.glb",
    "attiny814-ssf-hero.overlay.json",
    "attiny814-ssf-etched.glb"
  ],
  "component": {
    "mpn": "ATTINY814-SSF",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588938679474012160",
    "parts": {
      "symbol": "attiny814-ssf.kicad_sym",
      "footprint": "attiny814-ssf.kicad_mod",
      "model_3d": "attiny814-ssf-hero.glb",
      "model_3d_plain": "attiny814-ssf-etched.glb",
      "model_3d_step": "attiny814-ssf-etched.step",
      "model_3d_step_plain": "attiny814-ssf.step",
      "lbr": "attiny814-ssf.lbr"
    },
    "distributor_links": {
      "lcsc": "C614848",
      "digikey": "ATTINY814-SSF-ND",
      "mouser": "579-ATTINY814-SSF"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:01:23Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "ATTINY814-SSF-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "579-ATTINY814-SSF",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply pin for the device, placed on the VDD power domain."
      },
      {
        "number": "2",
        "name": "PA4",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA4 on the VDD domain, also ADC0 input AIN4, PTC X0/Y0, USART0 XDIR (alternate position), SPI0 SS, TCA0 WO4 and WOA, and CCL LUT0-OUT."
      },
      {
        "number": "3",
        "name": "PA5",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA5 on the VDD domain, also ADC0 input AIN5, PTC X1/Y1, DAC0 OUT, TCA0 WO5 and WO, and TCB1 WOB."
      },
      {
        "number": "4",
        "name": "PA6",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA6 on the VDD domain, also ADC0 input AIN6, PTC X2/Y2, AC0 negative input AINN0, and DAC0 OUT (PA6 is the DAC0 output pin)."
      },
      {
        "number": "5",
        "name": "PA7",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA7 on the VDD domain, also ADC0 input AIN7, PTC X3/Y3, AC0 positive input AINP0, and CCL LUT1-OUT."
      },
      {
        "number": "6",
        "name": "PB3",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PB3, also the TOSC1 crystal oscillator input, USART0 RxD (alternate position) and TCA0 WO0 (alternate position)."
      },
      {
        "number": "7",
        "name": "PB2",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PB2, also the TOSC2 crystal oscillator output, EVSYS EVOUT1, USART0 TxD and TCA0 WO2."
      },
      {
        "number": "8",
        "name": "PB1",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PB1, also ADC0 input AIN10, PTC X4/Y4, USART0 XCK, TWI0 SDA and TCA0 WO1."
      },
      {
        "number": "9",
        "name": "PB0",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PB0, also ADC0 input AIN11, PTC X5/Y5, USART0 XDIR, TWI0 SCL and TCA0 WO0."
      },
      {
        "number": "10",
        "name": "PA0 (RESET/UPDI)",
        "type": "bidirectional",
        "description": "Pin PA0 is the RESET or single-pin UPDI programming/debug interface, selected by the RSTPINCFG fuse; it can also serve as ADC0 input AIN0 and CCL LUT0-IN0 when used as GPIO."
      },
      {
        "number": "11",
        "name": "PA1",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA1, also ADC0 input AIN1, USART0 TxD (alternate position), SPI0 MOSI, TWI0 SDA (alternate position) and CCL LUT0-IN1."
      },
      {
        "number": "12",
        "name": "PA2",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA2, also EVSYS EVOUT0, ADC0 input AIN2, USART0 RxD (alternate position), SPI0 MISO, TWI0 SCL (alternate position) and CCL LUT0-IN2."
      },
      {
        "number": "13",
        "name": "PA3 (EXTCLK)",
        "type": "bidirectional",
        "description": "General-purpose I/O pin PA3, also the external clock input EXTCLK, ADC0 input AIN3, USART0 XCK (alternate position), SPI0 SCK and TCA0 WO3."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin for the device."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin-number mapping for the 14-pin SOIC was taken from the 14-Pin SOIC column of Table 5-1 (page 19) ; Pin types are inferred: all GPIO pins are marked bidirectional; RESET/UPDI on PA0 may behave as an i; Table 5-1 has no 14-pin SOIC entries for PB4-PB7 or PC0-PC5, so those ports are not on this package."
        ],
        "pages_sent": 120,
        "cost_usd": 0.3777,
        "at": "2026-10-18T02:59:38"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588938679474012160",
        "pages": 596,
        "sha256": "c2392fe1c4c9666a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "attiny814-ssf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "attiny814-ssf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "8eb55b8c7a87266dd304a1f57dab4380cc686d0f8d4a74285d5764ef27916da0",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}