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ATSAML21E16B-MNT

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Microchip Tech Pre-ordered MCUs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsaml21e16b-mntfactory-2.0.0extractor-text

Verified ATSAML21E16B-MNT

by Ray · last 10 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

10 Nov 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAML21E16B-MNT · QFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 1158-page datasheet
  • ✓distributor: lcsc C1339193, digikey ATSAML21E16B-MNTTR-ND, mouser 579-ATSAML21E16B-MNT
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-toasnpfb/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 39 kB, viewers/symbol.html 23 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atsaml21e16b-mnt.kicad_sym✓ atsaml21e16b-mnt.kicad_mod✓ atsaml21e16b-mnt.step
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Contents

README

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ATSAML21E16B-MNT

Microchip Tech · Pre-ordered MCUs · QFN-32-EP(5x5)

ATSAML21E16B-MNT from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional General-purpose I/O (VSWOUT-supplied backup pin) with EXTINT[0]/EXTWAKE[0], XIN32 32 kHz crystal input, SERCOM1 PAD[0] and TCC2 WO[0].
2 PA01 bidirectional General-purpose I/O (VSWOUT-supplied backup pin) with EXTINT[1]/EXTWAKE[1], XOUT32 32 kHz crystal output, SERCOM1 PAD[1] and TCC2 WO[1].
3 PA02 bidirectional General-purpose I/O supplied by VDDANA with EXTINT[2]/EXTWAKE[2], ADC AIN[0], PTC Y[0], DAC VOUT[0] and OPAMP OA_NEG[0].
4 PA03 bidirectional General-purpose I/O supplied by VDDANA with EXTINT[3]/EXTWAKE[3], external reference VREFA, ADC AIN[1] and PTC Y[1].
5 PA04 bidirectional General-purpose I/O supplied by VDDANA with EXTINT[4]/EXTWAKE[4], VREFB, ADC AIN[4], AC AIN[0], OA_OUT[2], SERCOM0 PAD[0] and TCC0 WO[0].
6 PA05 bidirectional General-purpose I/O supplied by VDDANA with EXTINT[5]/EXTWAKE[5], ADC AIN[5], AC AIN[1], DAC VOUT[1], OA_POS[2], SERCOM0 PAD[1] and TCC0 WO[1].
7 PA06 bidirectional General-purpose I/O supplied by VDDANA with EXTINT[6]/EXTWAKE[6], ADC AIN[6], AC AIN[2], PTC Y[4], OA_POS[0], SERCOM0 PAD[2] and TCC1 WO[0].
8 PA07 bidirectional General-purpose I/O supplied by VDDANA with EXTINT[7]/EXTWAKE[7], ADC AIN[7], AC AIN[3], OA_OUT[0], SERCOM0 PAD[3] and TCC1 WO[1].
9 VDDANA power_in Analog supply, 1.6V to 3.6V, with 100nF and 10µF decoupling; on SAM L21E VDDIO is electrically connected to and supplied through VDDANA.
10 GND power_in Ground for the device.
11 PA08 bidirectional High-sink general-purpose I/O with NMI, ADC AIN[16], PTC X[0]/Y[6], SERCOM0/2 PAD[0], TCC0 WO[0] and TCC1 WO[2]; I2C Hs-capable.
12 PA09 bidirectional High-sink general-purpose I/O with EXTINT[9], ADC AIN[17], PTC X[1]/Y[7], SERCOM0/2 PAD[1], TCC0 WO[1] and TCC1 WO[3]; I2C Hs-capable.
13 PA10 bidirectional General-purpose I/O with EXTINT[10], ADC AIN[18], PTC X[2]/Y[8], SERCOM0/2 PAD[2], TCC1 WO[0], TCC0 WO[2] and GCLK_IO[4].
14 PA11 bidirectional General-purpose I/O with EXTINT[11], ADC AIN[19], PTC X[3]/Y[9], SERCOM0/2 PAD[3], TCC1 WO[1], TCC0 WO[3] and GCLK_IO[5].
15 PA14 bidirectional General-purpose I/O with EXTINT[14], XOSC XIN crystal/clock input, SERCOM2/4 PAD[2], TC4 WO[0], TCC0 WO[4] and GCLK_IO[0].
16 PA15 bidirectional General-purpose I/O with EXTINT[15], XOSC XOUT crystal output, SERCOM2/4 PAD[3], TC4 WO[1], TCC0 WO[5] and GCLK_IO[1].
17 PA16 bidirectional High-sink general-purpose I/O with EXTINT[0], PTC X[4], SERCOM1/3 PAD[0], TCC2 WO[0], TCC0 WO[6] and GCLK_IO[2]; I2C Hs-capable.
18 PA17 bidirectional High-sink general-purpose I/O with EXTINT[1], PTC X[5], SERCOM1/3 PAD[1], TCC2 WO[1], TCC0 WO[7] and GCLK_IO[3]; I2C Hs-capable.
19 PA18 bidirectional General-purpose I/O with EXTINT[2], PTC X[6], SERCOM1/3 PAD[2], TC4 WO[0], TCC0 WO[2] and AC CMP[0].
20 PA19 bidirectional General-purpose I/O with EXTINT[3], PTC X[7], SERCOM1/3 PAD[3], TC4 WO[1], TCC0 WO[3] and AC CMP[1].
21 PA22 bidirectional High-sink general-purpose I/O with EXTINT[6], PTC X[10], SERCOM3/5 PAD[0], TC0 WO[0], TCC0 WO[4] and GCLK_IO[6]; I2C Hs-capable.
22 PA23 bidirectional High-sink general-purpose I/O with EXTINT[7], PTC X[11], SERCOM3/5 PAD[1], TC0 WO[1], TCC0 WO[5], USB SOF 1kHz and GCLK_IO[7]; I2C Hs-capable.
23 PA24 bidirectional General-purpose I/O with EXTINT[12], SERCOM3/5 PAD[2], TC1 WO[0], TCC1 WO[2] and USB DM.
24 PA25 bidirectional General-purpose I/O with EXTINT[13], SERCOM3/5 PAD[3], TC1 WO[1], TCC1 WO[3] and USB DP.
25 PA27 bidirectional High-sink general-purpose I/O supplied by VDDIN with EXTINT[15] and GCLK_IO[0].
26 RESET input Active-low external reset input with internal pull-up; low-level threshold below 0.33VDDIO at 1.6-2.0V and below 0.36VDDIO at 2.7-3.6V.
27 VSW power_out On-chip switching regulator output; connect a 10µH inductor to VDDCORE in switching mode, leave unconnected in linear mode.
28 GND power_in Ground for the device.
29 VDDCORE power_out Core supply of 0.9V to 1.2V typical with 100nF and 1µF decoupling; linear mode output, or switching mode input connected to VSW via inductor.
30 VDDIN power_in Main supply input, 1.6V to 3.6V, with 100nF and 10µF decoupling.
31 PA30 bidirectional General-purpose I/O supplied by VDDIN with EXTINT[10], SERCOM1 PAD[2], TCC1 WO[0], SWCLK (needs 1kΩ pull-up) and GCLK_IO[0].
32 PA31 bidirectional High-sink general-purpose I/O supplied by VDDIN with EXTINT[11], SERCOM1 PAD[3], TCC1 WO[1] and SWDIO (active only with a debugger present).
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 1034

CAD (KiCad official)

  • Symbol: ATSAML21E16B-MNT
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: atsaml21e16b-mnt-etched.step / atsaml21e16b-mnt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsaml21e16b-mnt.step / atsaml21e16b-mnt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1158 pp, sha256 c7ade1efde79dc98, retrieved 2026-11-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF