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Ray Publish 0.1.0 ba46bcd 2d ago
{
  "slug": "atsaml11e15a-afkph",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Pre-ordered MCUs, TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "atsaml11e15a-afkph",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "atsaml11e15a-afkph.kicad_sym",
    "atsaml11e15a-afkph.kicad_mod",
    "atsaml11e15a-afkph.glb",
    "atsaml11e15a-afkph.step",
    "atsaml11e15a-afkph.lbr",
    "docs/hero.png",
    "docs/atsaml11e15a-afkph-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "atsaml11e15a-afkph-hero.glb",
    "atsaml11e15a-afkph-hero.overlay.json",
    "atsaml11e15a-afkph-etched.glb"
  ],
  "component": {
    "mpn": "ATSAML11E15A-AFKPH",
    "manufacturer": "Microchip Tech",
    "package": "TQFP-32(7x7)",
    "pin_count": 32,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Pre-ordered MCUs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/926eb2262c67c9081b67a461951dfcb4.pdf",
    "parts": {
      "symbol": "atsaml11e15a-afkph.kicad_sym",
      "footprint": "atsaml11e15a-afkph.kicad_mod",
      "model_3d": "atsaml11e15a-afkph-hero.glb",
      "model_3d_plain": "atsaml11e15a-afkph-etched.glb",
      "model_3d_step": "atsaml11e15a-afkph-etched.step",
      "model_3d_step_plain": "atsaml11e15a-afkph.step",
      "lbr": "atsaml11e15a-afkph.lbr"
    },
    "distributor_links": {
      "lcsc": "C1338919",
      "digikey": "ATSAML11E15A-AFKPH-ND",
      "mouser": "556-SAML11E15AAFKPH"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T17:04:50Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "ATSAML11E15A-AFKPH-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "556-SAML11E15AAFKPH",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PA00/XIN32",
        "type": "bidirectional",
        "description": "General-purpose I/O PA00 on the VDDANA domain, alternately the 32.768 kHz crystal oscillator input XIN32 (also EXTINT[0], OA1NEG, SERCOM1/PAD[0], TC2/WO[0]) and resets to I/O in high-impedance state."
      },
      {
        "number": "2",
        "name": "PA01/XOUT32",
        "type": "bidirectional",
        "description": "General-purpose I/O PA01 on the VDDANA domain, alternately the 32.768 kHz crystal oscillator output XOUT32 (also EXTINT[1], XY[1], OA1POS, SERCOM1/PAD[1], TC2/WO[1]) and resets to I/O in high-impedance state."
      },
      {
        "number": "3",
        "name": "PA02",
        "type": "bidirectional",
        "description": "General-purpose I/O PA02 on the VDDANA domain with analog input AIN[0], VOUT DAC output and OA0NEG, and this pin must have a transition time above 50 us to avoid affecting XOSC32 cycle-to-cycle jitter."
      },
      {
        "number": "4",
        "name": "PA03",
        "type": "bidirectional",
        "description": "General-purpose I/O PA03 on the VDDANA domain with analog inputs VREFA and AIN[1], EXTINT[3], XY[3], OA2NEG and SERCOM0/PAD[3]."
      },
      {
        "number": "5",
        "name": "PA04",
        "type": "bidirectional",
        "description": "General-purpose I/O PA04 on the VDDANA domain with analog input VREFB and AIN[2], EXTINT[4], OA2OUT, SERCOM0/PAD[0], TC0/WO[0] and CCL input IN[0]."
      },
      {
        "number": "6",
        "name": "PA05",
        "type": "bidirectional",
        "description": "General-purpose I/O PA05 on the VDDANA domain with analog input AIN[3], EXTINT[5], XY[4], OA2POS, SERCOM0/PAD[1], TC0/WO[1] and CCL input IN[1]."
      },
      {
        "number": "7",
        "name": "PA06",
        "type": "bidirectional",
        "description": "General-purpose I/O PA06 on the VDDANA domain with analog input AIN[4], EXTINT[6], XY[5], OA0POS, SERCOM0/PAD[2], TC1/WO[0] and CCL input IN[2]."
      },
      {
        "number": "8",
        "name": "PA07",
        "type": "bidirectional",
        "description": "General-purpose I/O PA07 on the VDDANA domain with analog input AIN[5], EXTINT[7], OA0OUT, SERCOM0/PAD[3], TC1/WO[1] and CCL output OUT[0]."
      },
      {
        "number": "9",
        "name": "VDDANA",
        "type": "power_in",
        "description": "Analog supply voltage, 1.62V to 3.63V, which must equal VDDIO and needs 100 nF and 10 uF decoupling close to the device; a ferrite bead may isolate it from digital noise."
      },
      {
        "number": "10",
        "name": "GNDANA",
        "type": "power_in",
        "description": "Ground for the analog power domain."
      },
      {
        "number": "11",
        "name": "PA08",
        "type": "bidirectional",
        "description": "General-purpose I/O PA08 on the VDDIO domain with NMI, analog input AIN[6], XY[6], SERCOM1/PAD[0], SERCOM2/PAD[0], RTC/IN[0] and CCL input IN[3]."
      },
      {
        "number": "12",
        "name": "PA09",
        "type": "bidirectional",
        "description": "General-purpose I/O PA09 on the VDDIO domain with EXTINT[0], analog input AIN[7], XY[7], SERCOM1/PAD[1], SERCOM2/PAD[1], RTC/IN[1] and CCL input IN[4]."
      },
      {
        "number": "13",
        "name": "PA10",
        "type": "bidirectional",
        "description": "General-purpose I/O PA10 on the VDDIO domain with EXTINT[1], analog input AIN[8], XY[8], SERCOM1/PAD[2], SERCOM2/PAD[2], GCLK_IO[4] and CCL input IN[5]."
      },
      {
        "number": "14",
        "name": "PA11",
        "type": "bidirectional",
        "description": "General-purpose I/O PA11 on the VDDIO domain with EXTINT[2], analog input AIN[9], XY[9], SERCOM1/PAD[3], SERCOM2/PAD[3], GCLK_IO[3] and CCL output OUT[1]."
      },
      {
        "number": "15",
        "name": "PA14 / XOSC",
        "type": "bidirectional",
        "description": "General-purpose I/O PA14 on the VDDIO domain, alternately the crystal oscillator input XIN (also EXTINT[3], XY[10], SERCOM2/PAD[2], SERCOM0/PAD[2], TC0/WO[0] and GCLK_IO[0])."
      },
      {
        "number": "16",
        "name": "PA15/XOUT",
        "type": "bidirectional",
        "description": "General-purpose I/O PA15 on the VDDIO domain, alternately the crystal oscillator output XOUT (also EXTINT[4], XY[11], SERCOM2/PAD[3], SERCOM0/PAD[3], TC0/WO[1] and GCLK_IO[1])."
      },
      {
        "number": "17",
        "name": "PA16",
        "type": "bidirectional",
        "description": "High-sink General-purpose I/O PA16 on the VDDIO domain with EXTINT[5], XY[12], SERCOM1/PAD[0], SERCOM0/PAD[0], RTC/IN[2], GCLK_IO[2] and CCL input IN[0]; high-sink pins have different properties than standard pins."
      },
      {
        "number": "18",
        "name": "PA17",
        "type": "bidirectional",
        "description": "High-sink General-purpose I/O PA17 on the VDDIO domain with EXTINT[6], XY[13], SERCOM1/PAD[1], SERCOM0/PAD[1], RTC/IN[3], GCLK_IO[3] and CCL input IN[1]; high-sink pins have different properties than standard pins."
      },
      {
        "number": "19",
        "name": "PA18",
        "type": "bidirectional",
        "description": "General-purpose I/O PA18 on the VDDIO domain with EXTINT[7], XY[14], SERCOM1/PAD[2], SERCOM0/PAD[2], TC2/WO[0], RTC/OUT[0], AC/CMP[0] and CCL input IN[2]."
      },
      {
        "number": "20",
        "name": "PA19",
        "type": "bidirectional",
        "description": "General-purpose I/O PA19 on the VDDIO domain with EXTINT[0], XY[15], SERCOM1/PAD[3], SERCOM0/PAD[3], TC2/WO[1], RTC/OUT[1], AC/CMP[1] and CCL output OUT[0]."
      },
      {
        "number": "21",
        "name": "PA22",
        "type": "bidirectional",
        "description": "High-sink General-purpose I/O PA22 on the VDDIO domain with EXTINT[1], XY[16], SERCOM0/PAD[0], SERCOM2/PAD[0], TC0/WO[0], RTC/OUT[2] and GCLK_IO[2]; high-sink pins have different properties than standard pins."
      },
      {
        "number": "22",
        "name": "PA23",
        "type": "bidirectional",
        "description": "High-sink General-purpose I/O PA23 on the VDDIO domain with EXTINT[2], XY[17], SERCOM0/PAD[1], SERCOM2/PAD[1], TC0/WO[1], RTC/OUT[3] and GCLK_IO[1]; high-sink pins have different properties than standard pins."
      },
      {
        "number": "23",
        "name": "PA24",
        "type": "bidirectional",
        "description": "General-purpose I/O PA24 on the VDDIO domain with EXTINT[3], SERCOM0/PAD[2], SERCOM2/PAD[2] and TC1/WO[0]."
      },
      {
        "number": "24",
        "name": "PA25",
        "type": "bidirectional",
        "description": "General-purpose I/O PA25 on the VDDIO domain with EXTINT[4], SERCOM0/PAD[3], SERCOM2/PAD[3] and TC1/WO[1]."
      },
      {
        "number": "25",
        "name": "PA27",
        "type": "bidirectional",
        "description": "General-purpose I/O PA27 on the VDDIO domain with EXTINT[5] and GCLK_IO[0]."
      },
      {
        "number": "26",
        "name": "RESET",
        "type": "input",
        "description": "External reset input with an internal pull-up resistor, on the VDDIO domain."
      },
      {
        "number": "27",
        "name": "VDDCORE",
        "type": "passive",
        "description": "Core supply of 0.9V to 1.2V typical, which is the linear regulator output needing 100 nF and 1 uF decoupling in linear mode and must be fed from VDDOUT via a 10 uH inductor in switching mode."
      },
      {
        "number": "28",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for the digital power domain; the QFN exposed pad must be connected to GND."
      },
      {
        "number": "29",
        "name": "VDDOUT",
        "type": "power_out",
        "description": "On-chip switching regulator output that requires a 10 uH inductor to VDDCORE in switching regulator mode and is not connected in linear regulator mode."
      },
      {
        "number": "30",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital supply voltage, 1.62V to 3.63V, which must equal VDDANA and needs 100 nF and 10 uF decoupling close to the device."
      },
      {
        "number": "31",
        "name": "PA30 / SWCLK",
        "type": "input",
        "description": "Serial Wire Debug clock SWCLK on the VDDIO domain, the default function of PA30 that enables debugger probe detection, with an internal pull-up and a pull-up resistor recommended for noise immunity; pin is also XOSC32 jitter-sensitive per Table 4-3 (TQFP32 PA02 and PA31)."
      },
      {
        "number": "32",
        "name": "PA31 / SWDIO",
        "type": "bidirectional",
        "description": "Serial Wire Debug bidirectional data pin SWDIO on the VDDIO domain, also EXTINT[7], XY[19], SERCOM1/PAD[3], TC1/WO[1] and CCL output OUT[1]; this is a high-sink pin and its transition time must exceed 50 us for XOSC32 jitter minimization."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 32-pin pinout drawing (Figure 4-3) is image-only in the extracted text, so TQFP32 pin numbers an; The part carries the KPH suffix (securely key provisioned, RoT flow). The text does not state a pino; VDDCORE is a linear-regulator output or a switching-regulator input depending on mode, so it is type"
        ],
        "pages_sent": 118,
        "cost_usd": 0.1371,
        "at": "2026-11-02T17:04:28"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/926eb2262c67c9081b67a461951dfcb4.pdf",
        "pages": 1127,
        "sha256": "ee9c04451141173b",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "atsaml11e15a-afkph.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "53431be61c684e9d923915676a90cb08050c23ee3f834d76a77a3b19b41422f1",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "atsaml11e15a-afkph-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "bcd6039b7a987f82aa0eb89dc82149c48359abddf0b935686e31538fcae4d016",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}