component
ATSAML10D15A-MU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394
{
"schema_version": 1,
"type": "component",
"slug": "atsaml10d15a-mu",
"title": "ATSAML10D15A-MU",
"brief": "Microchip Tech Pre-ordered MCUs, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"atsaml10d15a-mu",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "ATSAML10D15A-MU",
"manufacturer": "Microchip Tech",
"package": "QFN-24-EP(4x4)",
"pin_count": 25,
"category": "Embedded Processors & Controllers",
"subcategory": "Pre-ordered MCUs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/926eb2262c67c9081b67a461951dfcb4.pdf",
"parts": {
"symbol": "atsaml10d15a-mu.kicad_sym",
"footprint": "atsaml10d15a-mu.kicad_mod",
"model_3d": "atsaml10d15a-mu-hero.glb",
"model_3d_plain": "atsaml10d15a-mu-etched.glb",
"model_3d_step": "atsaml10d15a-mu-etched.step",
"model_3d_step_plain": "atsaml10d15a-mu.step",
"lbr": "atsaml10d15a-mu.lbr"
},
"distributor_links": {
"lcsc": "C1338323",
"digikey": "ATSAML10D15A-MU-ND",
"mouser": "579-ATSAML10D15A-MU"
},
"distributor_check": {
"checked_at": "2026-10-30T18:37:20Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "ATSAML10D15A-MU-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "579-ATSAML10D15A-MU",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PA31 / SWDIO",
"type": "bidirectional",
"description": "High Sink GPIO on VDDIO (EXTINT[7], XY[19], SERCOM1/PAD[3], TC1/WO[1], GCLK/OUT[1]) that serves as the SWDIO debug data pin when the SWCLK probe detection selects SWDIO; reset state I/O, Hi-Z."
},
{
"number": "2",
"name": "PA00/XIN32",
"type": "bidirectional",
"description": "GPIO on the VDDANA domain that doubles as XIN32, the 32.768 kHz crystal oscillator input or external clock input (analog input for crystal, digital input for external clock); reset state I/O, Hi-Z."
},
{
"number": "3",
"name": "PA01/XOUT32",
"type": "bidirectional",
"description": "GPIO on the VDDANA domain that doubles as XOUT32, the 32.768 kHz crystal oscillator output (analog output); reset state I/O, Hi-Z."
},
{
"number": "4",
"name": "PA02",
"type": "bidirectional",
"description": "GPIO on the VDDANA domain with AIN[0], VOUT (DAC) and OA0NEG analog functions; its transition time must be greater than 50 us to avoid affecting XOSC32 cycle-to-cycle jitter."
},
{
"number": "5",
"name": "PA03",
"type": "bidirectional",
"description": "GPIO on the VDDANA domain with VREFA, AIN[1], OA2NEG and SERCOM0/PAD[3] functions; reset state I/O, Hi-Z."
},
{
"number": "6",
"name": "PA04",
"type": "bidirectional",
"description": "GPIO on the VDDANA domain with VREFB, AIN[2], OA2OUT, TC0/WO[0] and CCL IN[0] functions; reset state I/O, Hi-Z."
},
{
"number": "7",
"name": "PA05",
"type": "bidirectional",
"description": "GPIO on the VDDANA domain with AIN[3], OA2POS, TC0/WO[1] and CCL IN[1] functions; reset state I/O, Hi-Z."
},
{
"number": "8",
"name": "VDDANA",
"type": "power_in",
"description": "Analog power domain supply, 1.62 V to 3.63 V, which must be the same voltage applied to VDDIO; decoupled with 100 nF and 10 µF close to the device."
},
{
"number": "9",
"name": "GNDANA",
"type": "power_in",
"description": "Ground for the analog power domain."
},
{
"number": "10",
"name": "PA08",
"type": "bidirectional",
"description": "VDDIO-domain GPIO with NMI, AIN[6], XY[6], SERCOM1/PAD[0], SERCOM2/PAD[0] and RTC/IN[0] functions; reset state I/O, Hi-Z."
},
{
"number": "11",
"name": "PA14 / XIN",
"type": "bidirectional",
"description": "VDDIO-domain GPIO that doubles as XIN, the main 0.4 to 32 MHz crystal oscillator input or external clock input; reset state I/O, Hi-Z."
},
{
"number": "12",
"name": "PA15/XOUT",
"type": "bidirectional",
"description": "VDDIO-domain GPIO that doubles as XOUT, the output of the main 0.4 to 32 MHz crystal oscillator; reset state I/O, Hi-Z."
},
{
"number": "13",
"name": "PA16",
"type": "bidirectional",
"description": "High Sink VDDIO-domain GPIO (drive limits differ from normal pins) with EXTINT[5], SERCOM1/PAD[0], SERCOM0/PAD[0], RTC/IN[2] and GCLK_IO[2] functions; reset state I/O, Hi-Z."
},
{
"number": "14",
"name": "PA17",
"type": "bidirectional",
"description": "High Sink VDDIO-domain GPIO (drive limits differ from normal pins) with EXTINT[6], SERCOM1/PAD[1], SERCOM0/PAD[1], RTC/IN[3] and GCLK_IO[3] functions; reset state I/O, Hi-Z."
},
{
"number": "15",
"name": "PA18",
"type": "bidirectional",
"description": "VDDIO-domain GPIO with EXTINT[7], SERCOM1/PAD[2], SERCOM0/PAD[2], TC2/WO[0], RTC/OUT[0] and AC/CMP[0] functions; reset state I/O, Hi-Z."
},
{
"number": "16",
"name": "PA19",
"type": "bidirectional",
"description": "VDDIO-domain GPIO with EXTINT[0], SERCOM1/PAD[3], SERCOM0/PAD[3], TC2/WO[1], RTC/OUT[1] and AC/CMP[1] functions; reset state I/O, Hi-Z."
},
{
"number": "17",
"name": "PA22",
"type": "bidirectional",
"description": "High Sink VDDIO-domain GPIO (drive limits differ from normal pins) with EXTINT[1], SERCOM0/PAD[0], SERCOM2/PAD[0], TC0/WO[0], RTC/OUT[2] and GCLK_IO[2] functions; reset state I/O, Hi-Z."
},
{
"number": "18",
"name": "PA23",
"type": "bidirectional",
"description": "High Sink VDDIO-domain GPIO (drive limits differ from normal pins) with EXTINT[2], SERCOM0/PAD[1], SERCOM2/PAD[1], TC0/WO[1], RTC/OUT[3] and GCLK_IO[1] functions; reset state I/O, Hi-Z."
},
{
"number": "19",
"name": "RESET",
"type": "input",
"description": "External reset input with an internal pull-up resistor (reset state I, PU), so an external pull-up is optional."
},
{
"number": "20",
"name": "VDDCORE",
"type": "power_in",
"description": "Core supply voltage of 0.9 V to 1.2 V typical; it is the core supply output and external decoupling pin in linear regulator mode and the core supply input (connected to VDDOUT via a 10 µH inductor) in switching regulator mode, with 100 nF and 1 µF decoupling."
},
{
"number": "21",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "22",
"name": "VDDOUT",
"type": "power_out",
"description": "On-chip switching-mode regulator output, connected to VDDCORE through a 10 µH inductor in switching regulator mode and not connected in linear regulator mode."
},
{
"number": "23",
"name": "VDDIO",
"type": "power_in",
"description": "Digital supply voltage of 1.62 V to 3.63 V, which must be the same voltage applied to VDDANA; decoupled with 100 nF and 10 µF close to the device."
},
{
"number": "24",
"name": "PA30 / SWCLK",
"type": "bidirectional",
"description": "VDDIO-domain GPIO that defaults to the SWCLK debug clock function (reset state SWCLK, I, PU) used for debugger probe detection, and a pull-up on SWCLK is recommended for noise immunity."
},
{
"number": "25",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package mapping: ATSAML10D15A-MU decodes as D = 24 pins, M = VQFN, U = -40 to +85°C per the ordering; The exposed pad (thermal/ground pad) of the 24-pin VQFN is not given a pin number in the datasheet t; The pin-number placement in Figure 4-1 (24-pin VQFN) is an image and not present in the extracted te",
"exposed pad 25 added from the footprint",
"3/25 pins cited to the wrong page (name found elsewhere): ['8:VDDANA@p1091', '22:VDDOUT@p1091', '23:VDDIO@p1091']"
],
"pages_sent": 118,
"cost_usd": 0.5759,
"at": "2026-10-30T18:36:59"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/926eb2262c67c9081b67a461951dfcb4.pdf",
"pages": 1127,
"sha256": "ee9c04451141173b",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 25,
"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "atsaml10d15a-mu.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4,
4,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "atsaml10d15a-mu-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4,
4,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "61e733184fa92df315afdcb71e2cc2a3fe308577b99b66d73fe6d7ba9bebe41c",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Microchip Tech",
"Package": "QFN-24-EP(4x4)",
"Category": "Embedded Processors & Controllers",
"Pins": "25"
},
"appearance": {
"contacts": {
"quote": "indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor.",
"page": 976,
"doc": "ds.pdf",
"plating": "tin"
},
"version": 1,
"datasheet_sha256": "ee9c04451141173b787374388ddf9b607a5a569415ae85d9b5715237fd1cbb9e"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "ee9c04451141173b787374388ddf9b607a5a569415ae85d9b5715237fd1cbb9e",
"rows": [
{
"name": "Operating voltage range, nominal (VDDIO)",
"symbol": "VDDIO",
"kind": "recommended_operating",
"unit": "V",
"min": 1.62,
"typ": 3.3,
"max": 3.63,
"conditions": "Voltage range, nominal; same source must be applied to VDDIO and VDDANA",
"source_page": 24,
"source": "datasheet"
},
{
"name": "Operating voltage range, nominal (VDDANA)",
"symbol": "VDDANA",
"kind": "recommended_operating",
"unit": "V",
"min": 1.62,
"typ": 3.3,
"max": 3.63,
"conditions": "Voltage range, nominal; same source must be applied to VDDIO and VDDANA",
"source_page": 24,
"source": "datasheet"
},
{
"name": "Core supply voltage range (internal regulator output)",
"symbol": "VDDCORE",
"kind": "recommended_operating",
"unit": "V",
"min": 0.9,
"typ": null,
"max": 1.2,
"conditions": "Voltage range; core domain supply, generated internally",
"source_page": 24,
"source": "datasheet"
},
{
"name": "Operating temperature range (ordering suffix U)",
"symbol": "",
"kind": "recommended_operating",
"unit": "°C",
"min": -40,
"typ": null,
"max": 85,
"conditions": "Ordering code suffix U = -40 to +85°C",
"source_page": 16,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"atsaml10d15a-mu"
],
"discovery_pitch": "ATSAML10D15A-MU (Microchip Tech) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"atsaml10d15a-mu.kicad_sym",
"atsaml10d15a-mu.kicad_mod",
"atsaml10d15a-mu.glb",
"atsaml10d15a-mu.step",
"atsaml10d15a-mu.lbr",
"docs/hero.png",
"docs/atsaml10d15a-mu-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"atsaml10d15a-mu-hero.glb",
"atsaml10d15a-mu-hero.overlay.json",
"atsaml10d15a-mu-etched.glb"
],
"visibility": {
"public": true
}
}