component
ATMEGA808-MF
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "atmega808-mf",
"version": "0.1.0",
"type": "component",
"description": "Microchip Tech Pre-ordered MCUs, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"atmega808-mf",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"atmega808-mf.kicad_sym",
"atmega808-mf.kicad_mod",
"atmega808-mf.glb",
"atmega808-mf.step",
"atmega808-mf.lbr",
"docs/hero.png",
"docs/atmega808-mf-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"atmega808-mf-hero.glb",
"atmega808-mf-hero.overlay.json",
"atmega808-mf-etched.glb"
],
"component": {
"mpn": "ATMEGA808-MF",
"manufacturer": "Microchip Tech",
"package": "VQFN-32(5x5)",
"pin_count": 33,
"category": "Embedded Processors & Controllers",
"subcategory": "Pre-ordered MCUs",
"datasheet": "https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ProductDocuments/DataSheets/ATmega808-09-1608-09-DataSheet-DS40002172C.pdf",
"parts": {
"symbol": "atmega808-mf.kicad_sym",
"footprint": "atmega808-mf.kicad_mod",
"model_3d": "atmega808-mf-hero.glb",
"model_3d_plain": "atmega808-mf-etched.glb",
"model_3d_step": "atmega808-mf-etched.step",
"model_3d_step_plain": "atmega808-mf.step",
"lbr": "atmega808-mf.lbr"
},
"distributor_links": {
"lcsc": "C1340515",
"digikey": "ATMEGA808-MF-ND",
"mouser": "556-ATMEGA808-MF"
},
"distributor_check": {
"checked_at": "2026-10-30T22:11:10Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "ATMEGA808-MF-ND",
"status": "found"
},
"mouser": {
"pn": "556-ATMEGA808-MF",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PA3",
"type": "bidirectional",
"description": "GPIO pin PA3 on the VDD power domain, with alternate functions TWI0 SCL (host), USART0 XDIR, TCA0 WO3 and CCL LUT0 OUT per the multiplexing table."
},
{
"number": "2",
"name": "PA4",
"type": "bidirectional",
"description": "GPIO pin PA4 on the VDD power domain, with alternate functions USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4."
},
{
"number": "3",
"name": "PA5",
"type": "bidirectional",
"description": "GPIO pin PA5 on the VDD power domain, with alternate functions USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5."
},
{
"number": "4",
"name": "PA6",
"type": "bidirectional",
"description": "GPIO pin PA6 on the VDD power domain, with alternate functions USART0 XCK (alternate position), SPI0 SCK and CCL LUT0 OUT (alternate position)."
},
{
"number": "5",
"name": "PA7",
"type": "bidirectional",
"description": "GPIO pin PA7 on the VDD power domain, with alternate functions CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVSYS EVOUTA (alternate position)."
},
{
"number": "6",
"name": "PC0",
"type": "bidirectional",
"description": "GPIO pin PC0 on the VDD power domain, with alternate functions USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO (alternate position) and CCL LUT1 IN0."
},
{
"number": "7",
"name": "PC1",
"type": "bidirectional",
"description": "GPIO pin PC1 on the VDD power domain, with alternate functions USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL LUT1 IN1."
},
{
"number": "8",
"name": "PC2",
"type": "bidirectional",
"description": "GPIO pin PC2 on the VDD power domain, with alternate functions TWI0 SDA (host, alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVSYS EVOUTC and CCL LUT1 IN2."
},
{
"number": "9",
"name": "PC3",
"type": "bidirectional",
"description": "GPIO pin PC3 on the VDD power domain, with alternate functions TWI0 SCL (host, alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT."
},
{
"number": "10",
"name": "PD0",
"type": "bidirectional",
"description": "GPIO pin PD0 on the VDD power domain, with analog input AIN0, TCA0 WO0 (alternate position) and CCL LUT2 IN0."
},
{
"number": "11",
"name": "PD1",
"type": "bidirectional",
"description": "GPIO pin PD1 on the VDD power domain, with analog input AIN1, TCA0 WO1 (alternate position) and CCL LUT2 IN1."
},
{
"number": "12",
"name": "PD2",
"type": "bidirectional",
"description": "GPIO pin PD2 on the VDD power domain, with analog input AIN2, TCA0 WO2 (alternate position), EVSYS EVOUTD and CCL LUT2 IN2."
},
{
"number": "13",
"name": "PD3",
"type": "bidirectional",
"description": "GPIO pin PD3 on the VDD power domain, with analog input AIN3, AC0 N0, TCA0 WO3 (alternate position) and CCL LUT2 OUT."
},
{
"number": "14",
"name": "PD4",
"type": "bidirectional",
"description": "GPIO pin PD4 on the VDD power domain, with analog input AIN4, AC0 P1 and TCA0 WO4 (alternate position)."
},
{
"number": "15",
"name": "PD5",
"type": "bidirectional",
"description": "GPIO pin PD5 on the VDD power domain, with analog input AIN5, AC0 N1 and TCA0 WO5 (alternate position)."
},
{
"number": "16",
"name": "PD6",
"type": "bidirectional",
"description": "GPIO pin PD6 on the VDD power domain, with analog input AIN6, AC0 P2 and CCL LUT2 OUT (alternate position)."
},
{
"number": "17",
"name": "PD7",
"type": "bidirectional",
"description": "GPIO pin PD7 on the VDD power domain, with analog input AIN7, AC0 N2, VREFA (external voltage reference) and EVSYS EVOUTD (alternate position)."
},
{
"number": "18",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply pin for the AVDD power domain, which feeds the GPIO on AVDD power domain and the analog functions."
},
{
"number": "19",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "20",
"name": "PF0 (TOSC1)",
"type": "bidirectional",
"description": "GPIO pin PF0 on the VDD power domain, which is also the TOSC1 clock/crystal connection, with USART2 TxD, TCA0 WO0 (alternate position) and CCL LUT3 IN0."
},
{
"number": "21",
"name": "PF1 (TOSC2)",
"type": "bidirectional",
"description": "GPIO pin PF1 on the VDD power domain, which is also the TOSC2 clock/crystal connection, with USART2 RxD, TCA0 WO1 (alternate position) and CCL LUT3 IN1."
},
{
"number": "22",
"name": "PF2",
"type": "bidirectional",
"description": "GPIO pin PF2 on the VDD power domain, with TWI0 SDA (client, alternate position), analog input AIN12, USART2 XCK, TCA0 WO2 (alternate position), EVSYS EVOUTF and CCL LUT3 IN2."
},
{
"number": "23",
"name": "PF3",
"type": "bidirectional",
"description": "GPIO pin PF3 on the VDD power domain, with TWI0 SCL (client, alternate position), analog input AIN13, USART2 XDIR, TCA0 WO3 (alternate position) and CCL LUT3 OUT."
},
{
"number": "24",
"name": "PF4",
"type": "bidirectional",
"description": "GPIO pin PF4 on the VDD power domain, with analog input AIN14, USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position)."
},
{
"number": "25",
"name": "PF5",
"type": "bidirectional",
"description": "GPIO pin PF5 on the VDD power domain, with analog input AIN15, USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position)."
},
{
"number": "26",
"name": "PF6 (RESET)",
"type": "bidirectional",
"description": "GPIO pin PF6 on the VDD power domain, which can be configured as the RESET pin via the RSTPINCFG fuse, with USART2 XCK (alternate position) and CCL LUT3 OUT (alternate position)."
},
{
"number": "27",
"name": "UPDI",
"type": "bidirectional",
"description": "Unified Program and Debug Interface pin used for programming and debugging the device."
},
{
"number": "28",
"name": "VDD",
"type": "power_in",
"description": "Supply pin for the VDD power domain; the datasheet gives a device supply voltage of 1.8-5.5 V."
},
{
"number": "29",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "30",
"name": "PA0 (EXTCLK)",
"type": "bidirectional",
"description": "GPIO pin PA0 on the VDD power domain, which is also the EXTCLK external clock input, with USART0 TxD, TCA0 WO0 (alternate position) and CCL LUT0 IN0."
},
{
"number": "31",
"name": "PA1",
"type": "bidirectional",
"description": "GPIO pin PA1 on the VDD power domain, with USART0 RxD, TCA0 WO1 and CCL LUT0 IN1."
},
{
"number": "32",
"name": "PA2",
"type": "bidirectional",
"description": "GPIO pin PA2 on the VDD power domain, with TWI0 SDA (host), USART0 XCK, TCA0 WO2, TCB0 WO (alternate position), EVSYS EVOUTA and CCL LUT0 IN2."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin-position figure on page 15 is garbled in the text extraction, so the pin numbers were taken ; Alternate-function names marked (alternate position) depend on PORTMUX selection (page 18 note 3); t; PF6 is RESET only when the RSTPINCFG fuse selects RESET (page 57); otherwise it is a GPIO. Its type ",
"exposed pad 33 added from the footprint"
],
"pages_sent": 102,
"cost_usd": 0.331,
"at": "2026-10-30T22:10:53"
},
"datasheet": {
"url": "https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ProductDocuments/DataSheets/ATmega808-09-1608-09-DataSheet-DS40002172C.pdf",
"pages": 552,
"sha256": "e4bbeee766cda6b4",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "atmega808-mf.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "atmega808-mf-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "34ee098d5f203cad6c606be6b64866007cfe85b49b2586cc29b34e71f28ddb18",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "RXB (32-Lead VQFN, 5x5x0.9 mm, drawing C04-21395)",
"source_page": 532,
"D": {
"nom_mm": 5.0,
"range_mm": [
null,
null
]
},
"E1": {
"nom_mm": 5.0,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.85,
"range_mm": [
0.8,
0.9
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "atmega808-mf.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}