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ATM2312NSA

Agertech · MOSFETs · SOT-23

ATM2312NSA from Agertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±8.0 V absolute maximum, with threshold of 0.45 V min to 1.0 V max at ID = 250 µA.
2 S passive Source; continuous source-drain diode current is 1.04 A maximum.
3 D passive Drain; drain-source voltage is 20 V maximum with 5 A continuous and 20 A pulsed drain current.

Key specifications

Parameter Value
Manufacturer Agertech
Package SOT-23
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage V(BR)DSS 20 V VGS = 0V, ID = 250μA 2
Gate Threshold Voltage VGS(th) 0.45 0.7 1 V VDS = VGS, ID = 250μA 2
Gate Leakage Current IGSS -100 100 nA VDS = 0V, VGS = ±8V 2
Zero Gate Voltage Drain Current IDSS 1 μA VDS =20V, VGS = 0V 2
Drain-Source On-Resistance RDS(ON) 18 31.8 mΩ VGS = 4.5V, ID = 5.0A 2
Drain-Source On-Resistance RDS(ON) 23 35.6 mΩ VGS = 2.5V, ID = 4.7A 2
Drain-Source On-Resistance RDS(ON) 30 41.4 mΩ VGS = 1.8V, ID = 4.3A 2
Gate Resistance Rg 0.5 4.8 Ω f=1MHz 2
Turn-On Delay Time td(on) 10 ns VDD = 10V, RL = 2.2Ω, RG = 1Ω, VGEN = 5V, ID = 4A 2
Turn-On Rise Time tr 20 ns VDD = 10V, RL = 2.2Ω, RG = 1Ω, VGEN = 5V, ID = 4A 2
Turn-Off Delay Time td(off) 32 ns VDD = 10V, RL = 2.2Ω, RG = 1Ω, VGEN = 5V, ID = 4A 2
Turn-Off Fall Time tf 12 ns VDD = 10V, RL = 2.2Ω, RG = 1Ω, VGEN = 5V, ID = 4A 2
Forward Diode Voltage VSD 0.75 1.2 V VGS = 0V, IS = 4A 2
Drain-Source Voltage VDS 20 V TA=25℃ 1
Gate-Source Voltage VGS -8 8 V TA=25℃ 1
Continuous Drain Current ID 5 A t = 5s 1
Pulsed Drain Current IDM 20 A 1
Continuous Source-Drain Diode Current IS 1.04 A 1
Maximum Power Dissipation PD 0.35 W t = 5s 1
Junction Temperature TJ 150 ℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Junction-to-Ambient Thermal Resistance RθJA 357 ℃/W 1
Forward transconductance gfs 6 S VDS = 10V, ID = 5.0A 2
Input Capacitance Ciss 865 pF VDS = 10V, VGS = 0V, f = 1MHz 2
Output Capacitance Coss 105 pF VDS = 10V, VGS = 0V, f = 1MHz 2
Reverse Transfer Capacitance Crss 55 pF VDS = 10V, VGS = 0V, f = 1MHz 2

CAD (KiCad official)

  • Symbol: ATM2312NSA
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: atm2312nsa-etched.step / atm2312nsa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atm2312nsa.step / atm2312nsa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Agertech datasheet (6 pp, sha256 3b78b7a46ce67edf, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF