# ATM2310NSA

**Agertech** · MOSFETs · SOT-23

ATM2310NSA from Agertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate. Insulated MOSFET control terminal; VGS(th) ≈ 1-2.5 V, VGS absolute maximum ±20 V. Drive VGS ≥ 4.5 V for logic-level switching (RDS(on) ≤ 110 mΩ) or VGS = 10 V for full enhancement (RDS(on) ≤ 100 mΩ). |
| 2 | S | passive | Source. Common terminal for the channel and the intrinsic body diode anode. Typically tied to the low-side / battery-negative reference in a switching application. |
| 3 | D | passive | Drain. Switched high-side terminal; VDS absolute maximum 60 V, ID = 3 A continuous, 10 A pulsed. Also the intrinsic body-diode cathode (VSD ≈ 1.2 V at IS = 1 A). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Agertech |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 60 | V | Ta=25℃ | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V | Ta=25℃ | 1 |
| Continuous Drain Current | ID |  |  | 3 | A | Ta=25℃ | 1 |
| Pulsed Drain Current | IDM |  |  | 10 | A | Ta=25℃ | 1 |
| Maximum Power Dissipation | PD |  |  | 1 | W | Ta=25℃ | 1 |
| Junction Temperature | TJ |  |  | 150 | ℃ | Ta=25℃ | 1 |
| Storage Temperature | TSTG | -55 |  | 150 | ℃ | Ta=25℃ | 1 |
| Thermal Resistance from Junction to Ambient | RθJA |  |  | 125 | ℃/W | Surface mounted on FR4 board, t≤10s (note 2) | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | 60 |  |  | V | VGS = 0V, ID =250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | µA | VDS =48V, VGS = 0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 |  | 100 | nA | VGS =±20V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(th) | 1 |  | 2.5 | V | VDS =VGS, ID =250µA; pulse test: pulse width≤300µs, duty cycle≤0.5% (note 3) | 2 |
| Drain-Source On-Resistance | RDS(on) |  |  | 100 | mΩ | VGS =10V, ID =2A; pulse test (note 3) | 2 |
| Drain-Source On-Resistance | RDS(on) |  |  | 110 | mΩ | VGS =4.5V, ID =1A; pulse test (note 3) | 2 |

## CAD (KiCad official)

- Symbol: `ATM2310NSA`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `atm2310nsa-etched.step` / `atm2310nsa-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atm2310nsa.step` / `atm2310nsa.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Agertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588946015487733760) (None pp, sha256 `f0b552931c26d6e8`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/atm2310nsa-datasheet.pdf)