component
AT45DB041E-SHNHA-T
Public Made by Adomby adom
RENESAS NOR FLASH, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAT45DB041E-SHNHA-T
RENESAS · NOR FLASH · SOIC-8
AT45DB041E-SHNHA-T from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SI | input | Serial Input shifts in all command, address and data bits, latched on the rising edge of SCK and ignored whenever CS is deasserted. |
| 2 | SCK | input | Serial Clock controls data flow, with input latched on the rising edge and output on SO clocked out on the falling edge of SCK. |
| 3 | RESET | input | Active-low reset terminates the operation in progress and returns the internal state machine to idle while held low; drive it high externally if unused. |
| 4 | CS | input | Active-low Chip Select selects the device, a high-to-low transition starts and a low-to-high transition ends an operation, and a 10k Ohm pull-up to VCC is recommended. |
| 5 | WP | input | Active-low Write Protect protects all sectors specified in the Sector Protection Register against program and erase, is internally pulled high, and is recommended to be tied to VCC if unused. |
| 6 | VCC | power_in | Device power supply pin for a single 1.65 V to 3.6 V supply; operation at invalid VCC voltages can produce spurious results. |
| 7 | GND | power_in | Ground reference for the power supply, connected to system ground. |
| 8 | SO | tri_state | Serial Output shifts data out on the falling edge of SCK and is high-impedance whenever the device is deselected (CS deasserted). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ultra-Deep Power-Down Current | IUDPD | 0.4 | 1 | µA | CS= VCC. All other inputs at 0V or VCC | 53 | |
| Deep Power-Down Current | IDPD | 4.5 | 12 | µA | CS= VCC. All other inputs at 0V or VCC | 53 | |
| Standby Current | ISB | 25 | 40 | µA | CS= VCC. All other inputs at 0 V or VCC | 53 | |
| Active Current, Low Power Read (01h) | ICC1 | 6 | 9 | mA | f = 1 MHz; IOUT = 0 mA | 53 | |
| Active Current, Low Power Read (01h) | ICC1 | 7 | 10 | mA | f = 15 MHz; IOUT = 0 mA | 53 | |
| Active Current, Read Operation | ICC2 | 10 | 12 | mA | f = 50 MHz; IOUT = 0 mA | 53 | |
| Active Current, Read Operation | ICC2 | 12 | 15 | mA | f = 85 MHz; IOUT = 0 mA | 53 | |
| Active Current, Program Operation | ICC3 | 14 | 16 | mA | CS = VCC | 53 | |
| Active Current, Erase Operation | ICC4 | 8 | 12 | mA | CS = VCC | 53 | |
| Input Load Current | ILI | 1 | µA | All inputs at CMOS levels | 53 | ||
| Output Leakage Current | ILO | 1 | µA | All inputs at CMOS levels | 53 | ||
| Output Low Voltage | VOL | 0.4 | V | IOL = 100 µA | 53 | ||
| SCK Frequency | fSCK | 70 | MHz | 1.65 to 3.6 V | 55 | ||
| SCK Frequency for Continuous Read (0x0B) | fCAR1 | 70 | MHz | 1.65 to 3.6 V | 55 | ||
| SCK Frequency for Continuous Read (0x03) (Low Frequency) | fCAR2 | 40 | MHz | 1.65 to 3.6 V | 55 | ||
| SCK Frequency for Continuous Read (Low Power Mode, 01h Opcode) | fCAR3 | 15 | MHz | 1.65 to 3.6 V | 55 | ||
| SCK Frequency for Continuous Read (0x1B) | fCAR4 | 85 | MHz | 1.65 to 3.6 V | 55 | ||
| SCK High Time | tWH | 4 | ns | 1.65 to 3.6 V | 55 | ||
| SCK Low Time | tWL | 4 | ns | 1.65 to 3.6 V | 55 | ||
| SCK Rise Time, Peak-to-peak | tSCKR | 0.1 | V/ns | 1.65 to 3.6 V | 55 | ||
| SCK Fall Time, Peak-to-peak | tSCKF | 0.1 | V/ns | 1.65 to 3.6 V | 55 | ||
| Minimum CS High Time | tCS | 20 | ns | 1.65 to 3.6 V | 55 | ||
| CS Setup Time | tCSS | 6 | ns | 1.65 to 3.6 V | 55 | ||
| CS Hold Time | tCSH | 5 | ns | 1.65 to 3.6 V | 55 | ||
| Data In Setup Time | tSU | 2 | ns | 1.65 to 3.6 V | 55 | ||
| Data In Hold Time | tH | 1 | ns | 1.65 to 3.6 V | 55 | ||
| Output Hold Time | tHO | 0 | ns | 1.65 to 3.6 V | 55 | ||
| Output Disable Time | tDIS | 8 | ns | 1.65 to 3.6 V | 55 | ||
| Output Valid | tV | 7 | ns | 1.65 to 3.6 V | 55 | ||
| WP Low to Protection Enabled | tWPE | 1 | µs | 1.65 to 3.6 V | 55 | ||
| WP High to Protection Disabled | tWPD | 1 | µs | 1.65 to 3.6 V | 55 | ||
| Freeze Sector Lockdown Time (from CS High) | tLOCK | 200 | µs | 1.65 to 3.6 V | 55 | ||
| CS High to Ultra-Deep Power-Down | tEUDPD | 3 | µs | 1.65 to 3.6 V | 55 | ||
| Minimum CS Low Time to Exit Ultra-Deep Power-Down | tCSLU | 20 | ns | 1.65 to 3.6 V | 55 | ||
| Exit Ultra-Deep Power-Down Time | tXUDPD | 280 | µs | 1.65 to 3.6 V | 55 | ||
| CS High to Deep Power-Down | tEDPD | 2 | µs | 1.65 to 3.6 V | 55 | ||
| Resume from Deep Power-Down Time | tRDPD | 35 | µs | 1.65 to 3.6 V | 55 | ||
| Page to Buffer Transfer Time | tXFR | 100 | µs | 1.65 to 3.6 V | 55 | ||
| Page to Buffer Compare Time | tCOMP | 100 | µs | 1.65 to 3.6 V | 55 | ||
| RESET Pulse Width | tRST | 10 | µs | 1.65 to 3.6 V | 55 | ||
| RESET Recovery Time | tREC | 1 | µs | 1.65 to 3.6 V | 55 | ||
| Software Reset Time | tSWRST | 35 | µs | 1.65 to 3.6 V | 55 | ||
| Page Erase and Programming Time (256/264 bytes) | tEP | 10 | 25 | ms | 1.65 to 3.6 V | 57 | |
| Page Programming Time | tP | 1.5 | 3 | ms | 1.65 to 3.6 V | 57 | |
| Page Erase Time | tPE | 12 | 25 | ms | 1.65 to 3.6 V | 57 | |
| Block Erase Time | tBE | 30 | 35 | ms | 1.65 to 3.6 V | 57 | |
| Sector Erase Time | tSE | 0.7 | 1.1 | s | 1.65 to 3.6 V | 57 | |
| Chip Erase Time | tCE | 6 | 17 | s | 1.65 to 3.6 V | 57 | |
| Suspend Time Program | tSUSP | 8 | 15 | µs | Program, 1.65 to 3.6 V | 57 | |
| Suspend Time Erase | tSUSP | 20 | 30 | µs | Erase, 1.65 to 3.6 V | 57 | |
| Resume Time Program | tRES | 8 | 15 | µs | Program, 1.65 to 3.6 V | 57 | |
| Resume Time Erase | tRES | 20 | 30 | µs | Erase, 1.65 to 3.6 V | 57 | |
| OTP Security Register Program Time | tOTPP | 200 | 500 | µs | 1.65 to 3.6 V | 57 | |
| Absolute Maximum Vcc | VCC | 3.96 | V | 52 | |||
| Temperature under Bias | -55 | 125 | °C | 52 | |||
| Storage Temperature | -65 | 150 | °C | 52 | |||
| All Output Voltages with Respect to Ground | -0.6 | 4.2 | V | Max VCC of 3.6 V + 0.6 V | 52 | ||
| All Input Voltages with Respect to Ground | -0.6 | 4.2 | V | excluding VCC pin, including NC pins; Max VCC of 3.6 V + 0.6 V | 52 | ||
| Operating Temperature (Case) | -40 | 85 | °C | VCC Power Supply 1.65 V to 3.6 V | 52 | ||
| VCC Power Supply | VCC | 1.65 | 3.6 | V | 52 | ||
| Byte Programming Time | tBP | 8 | µs | 1.65 to 3.6 V | 57 |
CAD (KiCad official)
- Symbol:
AT45DB041E-SHNHA-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
at45db041e-shnha-t-etched.step/at45db041e-shnha-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at45db041e-shnha-t.step/at45db041e-shnha-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (78 pp, sha256
c2799495a2e9c41b, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).