component
AT32F402KBU7-4
Public Made by Adomby adom
ARTERY(雅特力) , QFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "at32f402kbu7-4",
"version": "0.1.0",
"type": "component",
"description": "ARTERY(雅特力) , QFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"ic",
"at32f402kbu7-4",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"at32f402kbu7-4.kicad_sym",
"at32f402kbu7-4.kicad_mod",
"at32f402kbu7-4.glb",
"at32f402kbu7-4.step",
"at32f402kbu7-4.lbr",
"docs/hero.png",
"docs/at32f402kbu7-4-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"at32f402kbu7-4-hero.glb",
"at32f402kbu7-4-hero.overlay.json",
"at32f402kbu7-4-etched.glb"
],
"component": {
"mpn": "AT32F402KBU7-4",
"manufacturer": "ARTERY(雅特力)",
"package": "QFN-32-EP(4x4)",
"pin_count": 33,
"category": "IC",
"subcategory": "IC",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8609179129443209216",
"parts": {
"symbol": "at32f402kbu7-4.kicad_sym",
"footprint": "at32f402kbu7-4.kicad_mod",
"model_3d": "at32f402kbu7-4-hero.glb",
"model_3d_plain": "at32f402kbu7-4-etched.glb",
"model_3d_step": "at32f402kbu7-4-etched.step",
"model_3d_step_plain": "at32f402kbu7-4.step",
"lbr": "at32f402kbu7-4.lbr"
},
"distributor_links": {
"lcsc": "C41383281"
},
"distributor_check": {
"checked_at": "2026-10-18T09:53:12Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Digital power supply pin; VDD operating range is 2.4 V to 3.6 V and it powers the GPIOs, ERTC, LEXT, BPR and the LDO."
},
{
"number": "2",
"name": "PF0",
"type": "bidirectional",
"description": "General-purpose I/O with standard TC level, multiplexed with TMR1_CH1 and I2C1_SDA, and used as the HEXT_IN high-speed crystal oscillator input."
},
{
"number": "3",
"name": "PF1",
"type": "bidirectional",
"description": "General-purpose I/O with standard TC level, multiplexed with TMR1_CH2C, I2C1_SCL, SPI2_CS and I2S2_WS, and used as the HEXT_OUT crystal oscillator output."
},
{
"number": "4",
"name": "NRST",
"type": "bidirectional",
"description": "Active-low device reset input and internal reset output with an internal weak pull-up (RPU 30 to 50 kΩ); VIL max is 0.8 V and VIH min is 2 V."
},
{
"number": "5",
"name": "VDDA",
"type": "power_in",
"description": "Analog power supply for the ADC, which must be at the same potential as VDD (2.4 V to 3.6 V)."
},
{
"number": "6",
"name": "PA0",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O with analog function (5 V tolerant only in input modes; in analog mode the input must stay below VDD + 0.3 V), also ADC1_IN0, WKUP1 and TAMP2."
},
{
"number": "7",
"name": "PA1",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN1, TMR2_CH2, I2C2_SDA and QSPI1_IO3."
},
{
"number": "8",
"name": "PA2",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN2, TMR9_CH1, USART2_TX and QSPI1_CS."
},
{
"number": "9",
"name": "PA3",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN3, TMR2_CH4, TMR9_CH2, I2S2_MCK and USART2_RX."
},
{
"number": "10",
"name": "PA4",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN4, SPI1_CS, I2S1_WS, USART2_CK and TMR14_CH1."
},
{
"number": "11",
"name": "PA5",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN5, SPI1_SCK, I2S1_CK, TMR2_CH1 and USART3_CK."
},
{
"number": "12",
"name": "PA6",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN6, SPI1_MISO, I2S1_MCK, TMR3_CH1 and QSPI1_IO0."
},
{
"number": "13",
"name": "PA7",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN7, SPI1_MOSI, I2S1_SD, TMR3_CH2 and QSPI1_IO1."
},
{
"number": "14",
"name": "PB0",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN8, SPI1_MISO, TMR3_CH3, USART3_CK and QSPI1_IO0."
},
{
"number": "15",
"name": "PB1",
"type": "bidirectional",
"description": "5 V-tolerant FTa I/O (input must stay below VDD + 0.3 V in analog mode), also ADC1_IN9, SPI1_MOSI, TMR3_CH4, USART3_RTS_DE and QSPI1_SCK."
},
{
"number": "16",
"name": "PB2",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR2_CH4, TMR3_EXT, I2C3_SMBA, SPI3_MOSI, TMR14_CH1C and QSPI1_SCK."
},
{
"number": "17",
"name": "VDD",
"type": "power_in",
"description": "Digital power supply pin; VDD operating range is 2.4 V to 3.6 V."
},
{
"number": "18",
"name": "PA8",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with CLKOUT, TMR1_CH1, I2C3_SCL, USART1_CK, USART2_TX and OTGFS1_SOF."
},
{
"number": "19",
"name": "PA9",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with CLKOUT, TMR1_CH2, SPI2_SCK, I2S2_CK, USART1_TX, I2C1_SCL and OTGFS1_VBUS."
},
{
"number": "20",
"name": "PA10",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR1_CH3, SPI2_MOSI, I2S2_SD, USART1_RX, I2C1_SDA and OTGFS1_ID."
},
{
"number": "21",
"name": "PA11",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O (leakage up to ±15 µA per Table 36), multiplexed with TMR1_CH4, I2C2_SCL, SPI2_CS, USART1_CTS, CAN1_RX and OTGFS1_D-."
},
{
"number": "22",
"name": "PA12",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O (leakage up to ±15 µA per Table 36), multiplexed with TMR1_EXT, I2C2_SDA, SPI2_MISO, USART1_RTS_DE, CAN1_TX and OTGFS1_D+."
},
{
"number": "23",
"name": "PA13",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O that after reset is the SWDIO debug pin with its internal pull-up enabled, also multiplexed with IR_OUT, I2C1_SDA, SPI3_MISO and OTGFS1_OE."
},
{
"number": "24",
"name": "PA14",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O that after reset is the SWCLK debug pin with its internal pull-down enabled, also multiplexed with I2C1_SMBA, SPI3_MOSI, I2S3_SD and USART2_TX."
},
{
"number": "25",
"name": "PA15",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR2_CH1, TMR2_EXT, SPI1_CS, I2S1_WS, SPI3_CS, USART1_TX, USART2_RX and QSPI1_IO2."
},
{
"number": "26",
"name": "PB3",
"type": "bidirectional",
"description": "5 V-tolerant FTf I/O with 20 mA sink capability, multiplexed with SWO, TMR2_CH2, I2C2_SDA, SPI1_SCK, USART1_RX and QSPI1_IO3."
},
{
"number": "27",
"name": "PB4",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR3_CH1, TMR11_BRK, I2C3_SDA, SPI1_MISO, USART1_CTS and QSPI1_SCK."
},
{
"number": "28",
"name": "PB5",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR3_CH2, I2C3_SMBA, SPI1_MOSI, I2S1_SD, USART1_CK and QSPI1_IO0, and usable as wake-up input WKUP6."
},
{
"number": "29",
"name": "PB6",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR4_CH1, TMR10_CH1C, I2C1_SCL, I2S1_MCK, USART1_TX and QSPI1_CS."
},
{
"number": "30",
"name": "PB7",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR4_CH2, TMR11_CH1C, I2C1_SDA, USART1_RX and QSPI1_IO1."
},
{
"number": "31",
"name": "PF11/BOOT0",
"type": "bidirectional",
"description": "5 V-tolerant FT pin that is sampled during reset as BOOT0 to select the boot mode; after reset it is PF11 in push-pull only and needs an external pull-down of 3.3 kΩ or less to ground."
},
{
"number": "32",
"name": "PB8",
"type": "bidirectional",
"description": "5 V-tolerant FT I/O, multiplexed with TMR2_CH1, TMR2_EXT, TMR4_CH3, I2C1_SCL, USART1_TX and CAN1_RX."
},
{
"number": "33",
"name": "EPAD (VSS / VSSA)",
"type": "power_in",
"description": "Exposed pad serving as the digital ground VSS and analog ground VSSA for the QFN32 package, with VSSA required to be at the same potential as VSS."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN decoding: AT32F402KBU7-4 = K (32 pins), U (QFN), -4 (QFN32 4x4 mm) per Table 61, so the QFN32 co; Table 9 QFN32 column for AT32F402 has no pins 6-9 ambiguity but the figure 8 text extraction (page 3; Pin 33 is the exposed pad listed as 'EPAD (VSS / VSSA)'; the QFN32 variant has no separate VSSA pin,"
],
"pages_sent": 70,
"cost_usd": 0.2533,
"at": "2026-10-18T09:51:17"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8609179129443209216",
"pages": 82,
"sha256": "60bf116b09ab059e",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "at32f402kbu7-4.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.0,
4.0,
0.6
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7b482a511cdf2cf875c31931f9fea7f745b8dac2ea6203531cd6604f40a290cb",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "at32f402kbu7-4-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.0,
4.0,
0.6
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "2680bb56e5ebb5f4e6668183c554c30d28d5110a239512f9314b3496b385a9e5",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}