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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	at25128b-sshl-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
viewers	at25128b-sshl-t: viewers · Ray	2mo ago
at25128b-sshl-t-etched.fit.json	at25128b-sshl-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
at25128b-sshl-t-etched.glb	at25128b-sshl-t: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray	1d ago
at25128b-sshl-t-etched.step	at25128b-sshl-t: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray	1d ago
at25128b-sshl-t.glb	Publish 0.1.0 · Ray	2mo ago
at25128b-sshl-t.kicad_mod	Publish 0.1.0 · Ray	2mo ago
at25128b-sshl-t.kicad_sym	Publish 0.1.0 · Ray	2mo ago
at25128b-sshl-t.lbr	Publish 0.1.0 · Ray	2mo ago
at25128b-sshl-t.step	Publish 0.1.0 · Ray	2mo ago
package.json	Publish 0.1.0 · Ray	2mo ago
page.json	at25128b-sshl-t: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray	1d ago
README.md	at25128b-sshl-t: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	1mo ago

AT25128B-SSHL-T

Microchip · EEPROM · SOIC-8

AT25128B-SSHL-T from Microchip, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS	input	Active-low SPI Chip Select. Pulling CS low selects the device and starts a serial transaction; the first byte after the falling edge is interpreted as the opcode. Bringing CS high ends the transaction and, for WRITE, triggers the internal programming cycle.
2	SO	output	SPI Serial Data Output (MISO). Data is shifted out on the falling edge of SCK, MSB first. The pin is high-impedance whenever CS is high or an invalid opcode is received.
3	WP	input	Active-low hardware Write Protect. When WP is low and the WPEN bit in the status register is 1, writes to the status register (including BP0/BP1) are inhibited, providing hardware write protection. Held high for normal read/write.
4	GND	power_in	Device ground reference for all supply and I/O signals.
5	SI	input	SPI Serial Data Input (MOSI). Opcodes, addresses and write data are shifted in on the rising edge of SCK, MSB first.
6	SCK	input	SPI Serial Clock input from the master. Supports SPI modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1). Maximum 20 MHz at VCC = 4.5-5.5V, 10 MHz at 2.5-5.5V, 5 MHz at 1.8-5.5V.
7	HOLD	input	Active-low Hold input. When taken low while SCK is low during a selected serial sequence, it pauses serial communication without resetting the transaction; SO becomes high-impedance and SI is ignored until HOLD is brought high again.
8	VCC	power_in	Positive supply voltage, 1.8V to 5.5V. Full 20 MHz SCK operation requires VCC ≥ 4.5V; standby current is <5 µA at 5V with CS = VCC.

Key specifications

Parameter	Value
Manufacturer	Microchip
Package	SOIC-8
Category	Memory
Pins	8

Ordering variants

AT25128B-SSHL-T
AT25128B-SSHL-TSSHL-B

CAD (KiCad official)

Symbol: AT25128B-SSHL-T
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: at25128b-sshl-t-etched.step / at25128b-sshl-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at25128b-sshl-t.step / at25128b-sshl-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip datasheet (22 pp, sha256 327b6418a5554831, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF