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docs at24c08cm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers at24c08cm: viewers · Ray
at24c08cm-etched.fit.json at24c08cm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
at24c08cm-etched.glb at24c08cm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
at24c08cm-etched.step at24c08cm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
at24c08cm.glb Publish 0.1.0 · Ray
at24c08cm.kicad_mod Publish 0.1.0 · Ray
at24c08cm.kicad_sym Publish 0.1.0 · Ray
at24c08cm.lbr Publish 0.1.0 · Ray
at24c08cm.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json at24c08cm: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md at24c08cm: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

AT24C08CM

HGSEMI · EEPROM · SOP-8

AT24C08CM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. Leave floating or tie to ground; do not use as a signal via.
2 NC unconnected No internal connection. Leave floating or tie to ground; do not use as a signal via.
3 E2 input Device Address Input. Selects one of two device address values so up to two AT24C08C devices can share a single 2-wire bus (E2 must match address bit E2 in the device address byte). Tie directly to VCC or GND; if left floating, an internal pull-down forces the pin to GND.
4 GND power_in Ground reference for the power supply. Connect to the system ground.
5 SDA bidirectional Serial Data. Open-drain bidirectional data line used to serially transfer address and data between the master and the EEPROM; requires an external pull-up resistor to VCC. Schmitt-trigger input with integrated spike-suppression filter.
6 SCL input Serial Clock. Clock input from the master; data on SDA is latched into the device on the rising edge and clocked out on the falling edge. Supports up to 400 kHz standard and 1 MHz high-speed operation.
7 WP input Write Protect. Tie to VCC to hardware write-protect the entire memory array (device becomes read-only); tie to GND to enable writes. Left floating, an internal pull-down forces the pin to GND.
8 VCC power_in Device power supply, 1.7 V to 5.5 V. Bypass locally with a 0.1 uF ceramic capacitor to GND. Operation outside the specified range may produce spurious results.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Memory
Pins 8

Ordering variants

  • AT24C08CM/TR
  • AT24C08CMAT24C08CN
  • AT24C08CMM/TR
  • AT24C08CMT/TR
  • AT24C08CMAT24C08CDQ/TR
  • AT24C08CM5/TR

CAD (KiCad official)

  • Symbol: AT24C08CM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: at24c08cm-etched.step / at24c08cm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at24c08cm.step / at24c08cm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (25 pp, sha256 e1c182cb482476f4, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF