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ASDM4976S-R

Public Made by Adom

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ASDsemi MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ASDM4976S-R

ASDsemi · MOSFETs · SOP-8

ASDM4976S-R from ASDsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of MOSFET channel 1; the device-level absolute maximum ratings apply (VGS ±20 V).
2 G1 input Gate terminal of MOSFET channel 1; gate-source voltage is limited to ±20 V per the absolute maximum ratings.
3 S2 passive Source terminal of MOSFET channel 2; the device-level absolute maximum ratings apply (VGS ±20 V).
4 G2 input Gate terminal of MOSFET channel 2; gate-source voltage is limited to ±20 V per the absolute maximum ratings.
5 D2 passive Drain terminal of MOSFET channel 2 (tied internally to pin 6); drain-source voltage is rated 60 V (N-channel) / -60 V (P-channel) in the absolute maximum ratings.
6 D2 passive Drain terminal of MOSFET channel 2 (tied internally to pin 5); drain-source voltage is rated 60 V (N-channel) / -60 V (P-channel) in the absolute maximum ratings.
7 D1 passive Drain terminal of MOSFET channel 1 (tied internally to pin 8); drain-source voltage is rated 60 V (N-channel) / -60 V (P-channel) in the absolute maximum ratings.
8 D1 passive Drain terminal of MOSFET channel 1 (tied internally to pin 7); drain-source voltage is rated 60 V (N-channel) / -60 V (P-channel) in the absolute maximum ratings.

Key specifications

Parameter Value
Manufacturer ASDsemi
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-Channel) VDS 60 V 1
Drain-Source Voltage (P-Channel) VDS -60 V 1
Gate-Source Voltage (N-Channel) VGS -20 20 V 1
Gate-Source Voltage (P-Channel) VGS -20 20 V 1
Continuous Drain Current (N-Channel) ID 5 A 1
Continuous Drain Current (P-Channel) ID -4 A 1
Pulsed Drain Current (N-Channel) IDM 20 A Note 1: repetitive rating, pulse width limited by maximum junction temperature 1
Pulsed Drain Current (P-Channel) IDM -15 A Note 1: repetitive rating, pulse width limited by maximum junction temperature 1
Maximum Power Dissipation (N-Channel) PD 2 W 1
Maximum Power Dissipation (P-Channel) PD 1.2 W 1
Operating Junction and Storage Temperature Range (N-Channel) TJ,TSTG -55 150 ℃ 1
Operating Junction and Storage Temperature Range (P-Channel) TJ,TSTG -55 150 ℃ 1
Drain-Source Breakdown Voltage (N-Channel) BVDSS 60 V VGS=0V ID=250μA 2
Drain-Source Breakdown Voltage (P-Channel) BVDSS -60 V VGS=0V ID=-250μA 3
Zero Gate Voltage Drain Current (N-Channel) IDSS 1 μA VDS=48V,VGS=0V 2
Zero Gate Voltage Drain Current (P-Channel) IDSS -1 μA 3
Gate-Body Leakage Current (N-Channel) IGSS -100 100 nA VGS=±20V,VDS=0V 2
Gate-Body Leakage Current (P-Channel) IGSS -100 100 nA VGS=±20V,VDS=0V 3
Gate Threshold Voltage (N-Channel) VGS(th) 1 2.5 V VDS=VGS,ID=250μA 2
Gate Threshold Voltage (P-Channel) VGS(th) -1 -2.5 V VDS=VGS,ID=-250μA 3
Drain-Source On-State Resistance (N-Channel) RDS(ON) 40 mΩ VGS=10V, ID=4A 2
Drain-Source On-State Resistance (N-Channel) RDS(ON) 50 mΩ VGS=4.5V, ID=2A 2
Drain-Source On-State Resistance (P-Channel) RDS(ON) 90 mΩ VGS=-10V, ID=-3.5A 3
Drain-Source On-State Resistance (P-Channel) RDS(ON) 115 mΩ VGS=-4.5V, ID=-3.1A 3
Forward Transconductance (P-Channel) gFS 12 S 3
Diode Forward Voltage (N-Channel) VSD 1.3 V VGS=0V,IS=3A 2
Diode Forward Voltage (P-Channel) VSD -1.3 V VGS=0V,IS=-1A 3
Diode Forward Current (N-Channel) IS 4 A Note 2: surface mounted on FR4 board, t ≤ 10 sec 2
Forward Transconductance (N-Channel) gFS 20 S 2
Input Capacitance (N-Channel) Clss 275 PF VDS=25V,VGS=0V, F=1.0MHz 2
Output Capacitance (N-Channel) Coss 45 PF VDS=25V,VGS=0V, F=1.0MHz 2
Reverse Transfer Capacitance (N-Channel) Crss 35 PF VDS=25V,VGS=0V, F=1.0MHz 2
Input Capacitance (P-Channel) Clss 730 PF VDS=-15V,VGS=0V, F=1.0MHz 3
Output Capacitance (P-Channel) Coss 124 PF VDS=-15V,VGS=0V, F=1.0MHz 3
Reverse Transfer Capacitance (P-Channel) Crss 75 PF VDS=-15V,VGS=0V, F=1.0MHz 3
Turn-on Delay Time (N-Channel) td(on) 4.5 nS VDD=15V, RL=3Ω, VGS=10V, RGEN=3Ω 2
Turn-on Rise Time (N-Channel) tr 2.5 nS VDD=15V, RL=3Ω, VGS=10V, RGEN=3Ω 2
Turn-Off Delay Time (N-Channel) td(off) 14.5 nS VDD=15V, RL=3Ω, VGS=10V, RGEN=3Ω 2
Turn-Off Fall Time (N-Channel) tf 3.5 nS VDD=15V, RL=3Ω, VGS=10V, RGEN=3Ω 2
Turn-on Delay Time (P-Channel) td(on) 9 nS VDD=-15V,RL=3.6Ω, VGS=-10V,RGEN=3Ω 3
Turn-on Rise Time (P-Channel) tr 5 nS VDD=-15V,RL=3.6Ω, VGS=-10V,RGEN=3Ω 3
Turn-Off Delay Time (P-Channel) td(off) 28 nS VDD=-15V,RL=3.6Ω, VGS=-10V,RGEN=3Ω 3
Turn-Off Fall Time (P-Channel) tf 13.5 nS VDD=-15V,RL=3.6Ω, VGS=-10V,RGEN=3Ω 3
Total Gate Charge (N-Channel) Qg 5.2 nC VDS=30V,ID=4.5A, VGS=10V 2
Gate-Source Charge (N-Channel) Qgs 0.85 nC VDS=30V,ID=4.5A, VGS=10V 2
Gate-Drain Charge (N-Channel) Qgd 1.3 nC VDS=30V,ID=4.5A, VGS=10V 2
Total Gate Charge (P-Channel) Qg 14 nC VDS=-30V,ID=-3.5A,VGS=-10V 3
Gate-Source Charge (P-Channel) Qgs 3.1 nC VDS=-30V,ID=-3.5A,VGS=-10V 3
Gate-Drain Charge (P-Channel) Qgd 3 nC VDS=-30V,ID=-3.5A,VGS=-10V 3
Thermal Resistance, Junction-to-Ambient (N-Channel) RθJA 89 ℃/W Note 2: surface mounted on FR4 board, t ≤ 10 sec 1
Thermal Resistance, Junction-to-Ambient (P-Channel) RθJA 90 ℃/W Note 2: surface mounted on FR4 board, t ≤ 10 sec 1

CAD (KiCad official)

  • Symbol: ASDM4976S-R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: asdm4976s-r-etched.step / asdm4976s-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); asdm4976s-r.step / asdm4976s-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ASDsemi datasheet (12 pp, sha256 cdfb424720de40eb, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF