# ASDM3010S-R

**ASDsemi** · MOSFETs · SOP-8

ASDM3010S-R from ASDsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel, VDS 30 V, ID 9 A at TA=25°C). |
| 2 | G1 | input | Gate of MOSFET 1, 5 V logic level control, VGS rated ±20 V. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel, VDS 30 V, ID 9 A at TA=25°C). |
| 4 | G2 | input | Gate of MOSFET 2, 5 V logic level control, VGS rated ±20 V. |
| 5 | D2 | passive | Drain of MOSFET 2, drain-source breakdown voltage 30 V. |
| 6 | D2 | passive | Drain of MOSFET 2, drain-source breakdown voltage 30 V. |
| 7 | D1 | passive | Drain of MOSFET 1, drain-source breakdown voltage 30 V. |
| 8 | D1 | passive | Drain of MOSFET 1, drain-source breakdown voltage 30 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ASDsemi |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source breakdown voltage | V(BR)DSS |  |  | 30 | V |  | 1 |
| Diode continuous forward current | IS |  |  | 2.3 | A | TA=25°C | 1 |
| Continuous drain current | ID |  |  | 9 | A | VGS=10V, TA=25°C | 1 |
| Continuous drain current | ID |  |  | 5 | A | VGS=10V, TA=70°C | 1 |
| Pulse drain current | IDM |  |  | 30 | A | TA=25°C, pulse tested | 1 |
| Avalanche energy, single pulsed | EAS |  |  | 9 | mJ | single pulsed | 1 |
| Maximum power dissipation | PD |  |  | 2.5 | W | TA=25°C | 1 |
| Gate-Source voltage | VGS | -20 |  | 20 | V |  | 1 |
| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance-Junction to Ambient | RθJA |  | 50 |  | °C/W |  | 1 |
| Thermal Resistance-Junction to Lead | RθJL |  | 40 |  | °C/W |  | 1 |
| Static drain-source on-resistance | RDS(on) |  | 15.5 |  | mΩ | VGS=10 V | 1 |

## CAD (KiCad official)

- Symbol: `ASDM3010S-R`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `asdm3010s-r-etched.step` / `asdm3010s-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `asdm3010s-r.step` / `asdm3010s-r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ASDsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904094631542784) (7 pp, sha256 `55becab907aeb2c8`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/asdm3010s-r-datasheet.pdf)