12 V to 5 V / 1 A Buck Molecule (TPS54202), built by Gemini 4 Argon in KiCad
Public Made by Adomby adom
| Name | Last updated |
|---|---|
| build | 5d ago |
| docs | 2d ago |
| pcm | 2d ago |
| screenshots | 4d ago |
| steps | 2d ago |
| video-draft | 2d ago |
| page.json | 2d ago |
| README.md | 2d ago |
12 V to 5 V / 1 A Buck Molecule (TPS54202), built by Gemini 4 Argon in KiCad
Status: finished and verified. Complete 28 x 20 mm 2-layer synchronous buck converter molecule (12 V nominal input, 9 V to 16 V range, 5.0 V / 1.0 A output at 500 kHz) built and verified in KiCad with adom-aiflow.
The build, start to finish
Gemini 4 Argon in Google Antigravity, inside Adom Hydrogen, builds this board from a one-sentence prompt, guided by adom-aiflow, in KiCad: It used 5.6 % of the weekly Antigravity quota on Google AI Ultra.
Argon video: the review draft
Video draft |
The YouTube video of this build, "Can Gemini 4 Argon Design a PCB?", is cut and waiting for John's voiceover. The draft shows the full video with its drafted title, description, chapters, thumbnail and subtitles. Watch it to review the edit or to record the narration over it. Review the draft · Watch it on YouTube (unlisted) |
Components
Every part on the board, each linked to its own wiki page (symbol, footprint and 3D model).
| Part | Qty | Refs | Value | Role | Buy |
|---|---|---|---|---|---|
![]() TPS54202DDCR Texas Instruments |
1 | U1 | TPS54202DDCR | sync buck, 4.5 to 28 V in, 2 A, 500 kHz | Mouser 595-TPS54202DDCR |
![]() AMPLH5030S-150MT Abracon |
1 | L1 | 15 µH | output inductor | Mouser 815-AMPLH5030S-150T |
![]() EEE-FK1V470P Panasonic |
1 | C1 | 47 µF 35 V | input bulk, damps the input cable | Mouser 667-EEE-FK1V470P |
![]() CC1206KKX7R8BB106 Yageo |
2 | C2, C3 | 10 µF 25 V X7R | input ceramic, the hot loop | Mouser 603-CC126KKX7R8BB106 |
![]() 0603B104J500CT Walsin |
3 | C4, C5, C10 | 100 nF 50 V | VIN bypass, bootstrap, bypass | Adom stock |
![]() CL21A226MPQNNNE Samsung Electro-Mechanics |
3 | C6, C7, C8 | 22 µF 10 V | output capacitors | Adom stock |
![]() 0402N680J500CT Walsin |
1 | C9 | 68 pF 50 V | feedback feed-forward | Adom stock |
![]() CR0402-FX-3303GLF Bourns |
1 | R1 | 330 kΩ | enable divider, top | Adom stock |
![]() CR0402-FX-6802GLF Bourns |
2 | R2, R3 | 68 kΩ | enable divider, feedback top | Adom stock |
![]() CR0402-FX-5601GLF Bourns |
1 | R4 | 5.6 kΩ | feedback trim | Adom stock |
![]() CR0402-FX-1002GLF Bourns |
3 | R5, R6, R7 | 10 kΩ | feedback bottom, divider | Adom stock |
![]() CR0402-FX-1001GLF Bourns |
1 | R8 | 1 kΩ | LED current | Adom stock |
![]() IN-S63BTG Inolux |
1 | D1 | green LED | power indicator | Adom stock |
![]() MachineContactMedium Adom |
6 | J1, J2, J3, J4, J5, J6 | machine contact | edge contacts: VIN, GND, EN, VOUT, VMON | Adom stock |
![]() MachinePinMediumShort Adom |
4 | MP1, MP2, MP3, MP4 | machine pin | corner pins (mechanical) | Adom stock |
Install every part in KiCad
This page is a KiCad Plugin and Content Manager repository. In KiCad, open Plugin and Content Manager, Manage..., add this URL, then install adom-aiflow from the Libraries tab:
https://wiki.adom.inc/api/pages/adom/argon-buck-12v5v-molecule/files/pcm/repository.json
The library appears as PCM_tps54202-12v-5v-buck-20261018 (package inc.adom.wiki.john.tps54202-12v-5v-buck-20261018): every symbol, footprint and 3D model of this board, from the parts' wiki pages.
Assembled Board, Layout, and Electro-Thermal Verification Gallery
Figure 1: Assembled 3D TPS54202 buck converter molecule in KiCad 3D Viewer showing laser-etched components, top and bottom silkscreen tags, and corner MachinePinMediumShort anchors.
Figure 2: Complete schematic drawn live in KiCad Schematic Editor using symbols from the board PCM library (PCM_tps54202-12v-5v-buck-20261018).
Figure 3: Routed and poured 2-layer PCB layout in KiCad PCB Editor with staged two-sided silkscreen labels and zero DRC violations.
Figure 4: Whole-net copper verification highlighting GND (92 items), VIN (41 items), VOUT (33 items), and SW (10 items) across F.Cu (82.14% coverage) and B.Cu (91.51% coverage).
Figure 5: 3D electro-thermal DC current-density distribution across F.Cu and B.Cu (SW peak 45.61 A/mm2, GND 16.17 A/mm2, VIN 15.73 A/mm2, VOUT 10.26 A/mm2 vs. 50 A/mm2 budget).
Figure 6: Still-air (+41.6 C peak on U1, +40.5 C on L1) and moving-air (+21.5 C on U1, +20.3 C on L1) temperature rise maps vs. 55.0 C maximum rise budget.
Figure 7: Interactive 3D electro-thermal walkthrough in Adom Fields verifying current necks and thermal spreading across the assembled molecule.
Engineering Datasheet and 3D Assets
- Assembled Board 3D Model (ENIG Copper GLB):
build/board.glb - Assembled Board STEP Twin:
build/board.step - Project Engineering Datasheet (PDF):
docs/datasheet.pdf
How this board was built
Every step of the build, in order, each with its own page of evidence (checks, screenshots, the AI's drawings and usage), written by adom-aiflow as the run went.
1. Intake: read the prompt and the requirements. The evidence
2. Design rules: choose the fab, load its design rules. The evidence
3. Circuit design: datasheet math and part values. The evidence
4. Test plan: what to measure on the workcell, a probe spot for each. The evidence
5. Sourcing: every part in stock, with an MPN. The evidence
6. Parts on the wiki: every part's wiki page, shown as it is picked. The evidence
7. Project page: README rev 1, component table, KiCad PCM repo. The evidence
8. Library: symbols, footprints and 3D from the wiki. The evidence
9. Schematic: drawn live, checked against the netlist. The evidence
10. SPICE simulation: the drawn schematic in SPICE: start-up, ripple, load step. The evidence
11. Components: wiki component identity and CAD audit. The evidence
12. 3D models: every 3D model bound and upright. The evidence
13. Placement: parts placed for current and heat. The evidence
14. Routing: every trace routed, DRC clean. The evidence
15. Heatsink vias: via arrays under the hot parts. The evidence
16. Copper pours: copper pours and stitching. The evidence
17. Rounded corners: sharp board corners rounded. The evidence
18. Current: current density on every loaded net. The evidence
19. Thermal: temperature rise against the budget. The evidence
20. Fields: current and heat solved in 3D. The evidence
21. Pour walkthrough: each pour net lit in turn. The evidence
22. Silkscreen: labels, polarity, pinouts, both faces. The evidence
23. 3D board: the finished board in 3D. The evidence
24. Finish line: 0 unconnected, 0 errors, every check passed. The evidence
25. Gerbers, BOM, CPL: manufacturing files written and checked. The evidence














