component
AP7375Q-33SP-13
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AP7375Q-33SP-13
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
AP7375Q-33SP-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output voltage of the LDO, fixed at 3.3V for this variant, with absolute maximum rating of -0.3 to 6 V and a 1 µF minimum ceramic output capacitor required for stability. |
| 2 | NC | unconnected | Not connected internally; the datasheet recommends connecting this pin to GND to maximize PCB copper for thermal dissipation. |
| 3 | NC | unconnected | Not connected internally; the datasheet recommends connecting this pin to GND to maximize PCB copper for thermal dissipation. |
| 4 | NC | unconnected | Not connected internally; the datasheet recommends connecting this pin to GND to maximize PCB copper for thermal dissipation. |
| 5 | GND | power_in | Ground reference pin for the regulator, to be connected to the external circuit ground to limit voltage drop from trace impedance. |
| 6 | NC | unconnected | Not connected internally; the datasheet recommends connecting this pin to GND to maximize PCB copper for thermal dissipation. |
| 7 | EN | input | Enable input that turns the LDO output on and off; EN high level is at least 1 V, EN low level is at most 0.4 V, and the absolute maximum EN voltage is 55 V. |
| 8 | VIN | power_in | Input voltage pin with recommended supply range of 3.0 V to 45 V and absolute maximum rating of -0.3 to 55 V, requiring a 1 µF ceramic input capacitor close to the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 3 | 45 | V | 4 | ||
| Quiescent Current | IGND | 2.1 | 8 | µA | VIN = 12V, No load | 4 | |
| Output Voltage | VOUT | 98 | 102 | % of VOUT | VIN = 12V, IOUT = 10mA; printed as VOUT x 98% (min) and VOUT x 102% (max) | 4 | |
| Output Current | IOUT_MAX | 300 | 350 | mA | 4 | ||
| Dropout Voltage | VDROP | 35 | 80 | mV | IOUT = 10mA, VIN = VOUTNOM, 0.1V | 4 | |
| Dropout Voltage | VDROP | 350 | 580 | mV | IOUT = 100mA, VIN = VOUTNOM, 0.1V | 4 | |
| Dropout Voltage | VDROP | 1200 | 1400 | mV | IOUT = 300mA, VIN = VOUTNOM, 0.1V, TA = +25°C | 4 | |
| Load Regulation | ΔVOUT(ΔIOUT) | 0.02 | 0.025 | %/mA | VIN = 12V, 1mA ≤ IOUT ≤ 100mA | 4 | |
| Line Regulation | ΔVOUT(ΔVIN) | 0.01 | 0.02 | %/V | VOUTNOM + 2V ≤ VIN ≤ 45V, IOUT = 1mA | 4 | |
| EN High Level | VENH | 1 | V | Enabled | 4 | ||
| EN Low Level | VENL | 0.4 | V | Disabled | 4 | ||
| Current Limit | ILIMIT | 500 | mA | 4 | |||
| Thermal Shutdown Temperature | TOTSD | 150 | °C | 4 | |||
| Thermal Shutdown Hysteresis | THYOTSD | 10 | °C | 4 | |||
| Power Supply Rejection Ratio | PSRR | 85 | dB | VIN = 12V, IOUT = 10mA, VOUT = 3.3V @1kHz | 4 | ||
| Output Noise Voltage | Vn | 120 | µVrms | BW = 10Hz to 100kHz, IOUT = 30mA | 4 | ||
| Input Voltage | VIN | 3 | 45 | V | 4 | ||
| Output Voltage | VOUT | 5 | V | 4 | |||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 4 | ||
| Input Capacitor | CIN | 1 | µF | 4 | |||
| Output Capacitor | COUT | 1 | 10 | µF | 4 | ||
| Supply Input Voltage | VIN | -0.3 | 55 | V | 3 | ||
| Regulated Output Voltage | VOUT | -0.3 | 6 | V | 3 | ||
| EN to GND | VEN | -0.3 | 55 | V | 3 | ||
| Lead Temperature (Soldering, 10sec) | TLEAD | 260 | °C | Soldering, 10sec | 3 | ||
| Operating Junction Temperature | TJ | 150 | °C | 3 | |||
| Operating Ambient Temperature | TA | -40 | 125 | °C | 3 | ||
| Storage Temperature Range | TSTG | -40 | 150 | °C | 3 | ||
| CDM ESD (Charge Device Model) | -1.5 | 1.5 | kV | 3 | |||
| HBM ESD (Human Body Model) | -3 | 3 | kV | 3 | |||
| Thermal Resistance Junction to Ambient, SO-8EP | θJA | 47.7 | °C/W | SO-8EP, JEDEC STD.51 High-K board, TA = +25°C | 3 | ||
| Thermal Resistance Junction to Case, SO-8EP | θJC | 17.4 | °C/W | SO-8EP | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | HBM ESD (Human Body Model) 3 kV Note: 4. a). Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and | 3 | |
| contacts | tin | • Terminals: ▪ SOT89/ SO-8EP/ SOT25: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 17 |
CAD (KiCad official)
- Symbol:
AP7375Q-33SP-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ap7375q-33sp-13-etched.step/ap7375q-33sp-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7375q-33sp-13.step/ap7375q-33sp-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
c298cf9459111ab2, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).