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AP4N2R6H
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APEC(Advanced Power Elec) MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AP4N2R6H
APEC(Advanced Power Elec) · MOSFETs · TO-252
AP4N2R6H from APEC(Advanced Power Elec), in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±20 V, with a gate threshold of 2 V min to 5 V max at ID=250 uA. |
| 2 | D | passive | Drain (center pin, connected to the exposed tab); drain-source voltage rated 40 V and drain current 75 A package-limited at TC=25 °C. |
| 3 | S | passive | Source; connects to the body diode anode with a forward voltage of 1.2 V max at IS=40 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | APEC(Advanced Power Elec) |
| Package | TO-252 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 40 | V | Tj=25°C | 1 | ||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Drain Current, VGS @ 10V (package limited) | ID | 75 | A | TC=25℃, VGS@10V, package limitation | 1 | ||
| Drain Current, VGS @ 10V (silicon limited) | ID | 45 | A | Silicon Limited, VGS@10V | 1 | ||
| Pulsed Drain Current | IDM | 300 | A | 1 | |||
| Total Power Dissipation | PD | 104 | W | TC=25℃ | 1 | ||
| Total Power Dissipation | PD | 2 | W | TA=25℃ | 1 | ||
| Single Pulse Avalanche Energy | EAS | 150 | mJ | Starting Tj=25°C, VDD=25V, L=0.1mH, RG=25Ω | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance, Junction-case | Rthj-c | 1.2 | ℃/W | 1 | |||
| Thermal Resistance, Junction-ambient | Rthj-a | 62.5 | ℃/W | PCB mount, 1 in2 copper pad FR4 | 1 | ||
| Drain-Source Breakdown Voltage | BVDSS | 40 | V | VGS=0V, ID=250uA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 2.6 | mΩ | VGS=10V, ID=40A | 2 | ||
| Gate Threshold Voltage | VGS(th) | 2 | 5 | V | VDS=VGS, ID=250uA | 2 | |
| Drain-Source Leakage Current | IDSS | 10 | uA | VDS=32V, VGS=0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS=+20V, VDS=0V | 2 | |
| Total Gate Charge | Qg | 87 | 194 | nC | ID=40A, VDS=32V, VGS=10V | 2 | |
| Input Capacitance | Ciss | 5100 | 8160 | pF | VGS=0V, VDS=20V, f=1.0MHz | 2 | |
| Gate Resistance | Rg | 1.2 | 2.4 | Ω | f=1.0MHz | 2 | |
| Forward On Voltage | VSD | 1.2 | V | IS=40A, VGS=0V | 2 | ||
| Forward Transconductance | gfs | 140 | S | VDS=5V, ID=40A | 2 | ||
| Gate-Source Charge | Qgs | 20 | nC | 2 | |||
| Gate-Drain Charge | Qgd | 23 | nC | 2 | |||
| Turn-on Delay Time | td(on) | 15 | ns | VDS=20V, ID=40A, RG=1.6Ω, VGS=10V | 2 | ||
| Rise Time | tr | 63 | ns | 2 | |||
| Turn-off Delay Time | td(off) | 36 | ns | 2 | |||
| Fall Time | tf | 12 | ns | 2 | |||
| Output Capacitance | Coss | 720 | pF | 2 | |||
| Reverse Transfer Capacitance | Crss | 360 | pF | 2 | |||
| Reverse Recovery Time | trr | 16 | ns | IS=40A, VGS=0V, dI/dt=100A/µs | 2 | ||
| Reverse Recovery Charge | Qrr | 5.4 | nC | 2 |
CAD (KiCad official)
- Symbol:
AP4N2R6H - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
ap4n2r6h-etched.step/ap4n2r6h-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap4n2r6h.step/ap4n2r6h.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: APEC(Advanced Power Elec) datasheet (8 pp, sha256
34c7addc57593817, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP4N2R6H
**APEC(Advanced Power Elec)** · MOSFETs · TO-252
AP4N2R6H from APEC(Advanced Power Elec), in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±20 V, with a gate threshold of 2 V min to 5 V max at ID=250 uA. |
| 2 | D | passive | Drain (center pin, connected to the exposed tab); drain-source voltage rated 40 V and drain current 75 A package-limited at TC=25 °C. |
| 3 | S | passive | Source; connects to the body diode anode with a forward voltage of 1.2 V max at IS=40 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | APEC(Advanced Power Elec) |
| Package | TO-252 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 40 | V | Tj=25°C | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Drain Current, VGS @ 10V (package limited) | ID | | | 75 | A | TC=25℃, VGS@10V, package limitation | 1 |
| Drain Current, VGS @ 10V (silicon limited) | ID | | | 45 | A | Silicon Limited, VGS@10V | 1 |
| Pulsed Drain Current | IDM | | | 300 | A | | 1 |
| Total Power Dissipation | PD | | | 104 | W | TC=25℃ | 1 |
| Total Power Dissipation | PD | | | 2 | W | TA=25℃ | 1 |
| Single Pulse Avalanche Energy | EAS | | | 150 | mJ | Starting Tj=25°C, VDD=25V, L=0.1mH, RG=25Ω | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance, Junction-case | Rthj-c | | | 1.2 | ℃/W | | 1 |
| Thermal Resistance, Junction-ambient | Rthj-a | | | 62.5 | ℃/W | PCB mount, 1 in2 copper pad FR4 | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 40 | | | V | VGS=0V, ID=250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 2.6 | mΩ | VGS=10V, ID=40A | 2 |
| Gate Threshold Voltage | VGS(th) | 2 | | 5 | V | VDS=VGS, ID=250uA | 2 |
| Drain-Source Leakage Current | IDSS | | | 10 | uA | VDS=32V, VGS=0V | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VGS=+20V, VDS=0V | 2 |
| Total Gate Charge | Qg | | 87 | 194 | nC | ID=40A, VDS=32V, VGS=10V | 2 |
| Input Capacitance | Ciss | | 5100 | 8160 | pF | VGS=0V, VDS=20V, f=1.0MHz | 2 |
| Gate Resistance | Rg | | 1.2 | 2.4 | Ω | f=1.0MHz | 2 |
| Forward On Voltage | VSD | | | 1.2 | V | IS=40A, VGS=0V | 2 |
| Forward Transconductance | gfs | | 140 | | S | VDS=5V, ID=40A | 2 |
| Gate-Source Charge | Qgs | | 20 | | nC | | 2 |
| Gate-Drain Charge | Qgd | | 23 | | nC | | 2 |
| Turn-on Delay Time | td(on) | | 15 | | ns | VDS=20V, ID=40A, RG=1.6Ω, VGS=10V | 2 |
| Rise Time | tr | | 63 | | ns | | 2 |
| Turn-off Delay Time | td(off) | | 36 | | ns | | 2 |
| Fall Time | tf | | 12 | | ns | | 2 |
| Output Capacitance | Coss | | 720 | | pF | | 2 |
| Reverse Transfer Capacitance | Crss | | 360 | | pF | | 2 |
| Reverse Recovery Time | trr | | 16 | | ns | IS=40A, VGS=0V, dI/dt=100A/µs | 2 |
| Reverse Recovery Charge | Qrr | | 5.4 | | nC | | 2 |
## CAD (KiCad official)
- Symbol: `AP4N2R6H`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `ap4n2r6h-etched.step` / `ap4n2r6h-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap4n2r6h.step` / `ap4n2r6h.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [APEC(Advanced Power Elec) datasheet](docs/ap4n2r6h-datasheet.pdf) (8 pp, sha256 `34c7addc57593817`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap4n2r6h-datasheet.pdf)