component
AP4435GM
Public Made by Adomby adom
APEC Advanced Power Elec MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AP4435GM
APEC Advanced Power Elec · MOSFETs · SO-8
AP4435GM from APEC Advanced Power Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel enhancement-mode MOSFET, which is rated for a drain-source voltage (BVDSS) of -30 V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are to be connected together. |
| 3 | S | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are to be connected together. |
| 4 | G | input | Gate terminal of the MOSFET; the datasheet prints a gate-source rating of +20 V and specifies RDS(ON) at VGS = -4.5 V and -10 V. |
| 5 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
| 6 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
| 7 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
| 8 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | APEC Advanced Power Elec |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -30 | V | 1 | |||
| Gate-Source Voltage | VGS | 20 | V | 1 | |||
| Continuous Drain Current | ID | -9 | A | TA=25℃ | 1 | ||
| Continuous Drain Current | ID | -7.3 | A | TA=70℃ | 1 | ||
| Pulsed Drain Current | IDM | -50 | A | Pulse width limited by max. junction temperature | 1 | ||
| Total Power Dissipation | PD | 2.5 | W | TA=25℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Maximum Thermal Resistance, Junction-ambient | Rthj-a | 50 | ℃/W | Surface mounted on 1 in2 copper pad of FR4 board, t<10sec | 1 | ||
| Maximum Thermal Resistance, Junction-ambient (min. copper pad) | Rthj-a | 125 | ℃/W | Mounted on min. copper pad | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | -30 | V | VGS=0V, ID=-250uA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 20 | mΩ | VGS=-10V, ID=-7A | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 32 | mΩ | VGS=-4.5V, ID=-5A | 2 | ||
| Gate Threshold Voltage | VGS(th) | -1 | -3 | V | VDS=VGS, ID=-250uA | 2 | |
| Drain-Source Leakage Current | IDSS | -1 | uA | VDS=-30V, VGS=0V | 2 | ||
| Drain-Source Leakage Current (Tj=70℃) | -25 | uA | VDS=-24V, VGS=0V | 2 | |||
| Gate-Source Leakage | IGSS | 100 | nA | VGS=+20V | 2 | ||
| Total Gate Charge | Qg | 18 | 29 | nC | ID=-7A | 2 | |
| Input Capacitance | Ciss | 1175 | 1690 | pF | VGS=0V | 2 | |
| Forward On Voltage | VSD | -1.2 | V | IS=-2.1A, VGS=0V | 2 |
CAD (KiCad official)
- Symbol:
AP4435GM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
ap4435gm-etched.step/ap4435gm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap4435gm.step/ap4435gm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: APEC Advanced Power Elec datasheet (5 pp, sha256
72e6e89407010f76, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP4435GM
**APEC Advanced Power Elec** · MOSFETs · SO-8
AP4435GM from APEC Advanced Power Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel enhancement-mode MOSFET, which is rated for a drain-source voltage (BVDSS) of -30 V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are to be connected together. |
| 3 | S | passive | Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are all source and are to be connected together. |
| 4 | G | input | Gate terminal of the MOSFET; the datasheet prints a gate-source rating of +20 V and specifies RDS(ON) at VGS = -4.5 V and -10 V. |
| 5 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
| 6 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
| 7 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
| 8 | D | passive | Drain terminal of the P-channel MOSFET; pins 5 through 8 are all drain and are to be connected together. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | APEC Advanced Power Elec |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | -30 | V | | 1 |
| Gate-Source Voltage | VGS | | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | -9 | A | TA=25℃ | 1 |
| Continuous Drain Current | ID | | | -7.3 | A | TA=70℃ | 1 |
| Pulsed Drain Current | IDM | | | -50 | A | Pulse width limited by max. junction temperature | 1 |
| Total Power Dissipation | PD | | | 2.5 | W | TA=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Maximum Thermal Resistance, Junction-ambient | Rthj-a | | | 50 | ℃/W | Surface mounted on 1 in2 copper pad of FR4 board, t<10sec | 1 |
| Maximum Thermal Resistance, Junction-ambient (min. copper pad) | Rthj-a | | | 125 | ℃/W | Mounted on min. copper pad | 2 |
| Drain-Source Breakdown Voltage | BVDSS | -30 | | | V | VGS=0V, ID=-250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 20 | mΩ | VGS=-10V, ID=-7A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 32 | mΩ | VGS=-4.5V, ID=-5A | 2 |
| Gate Threshold Voltage | VGS(th) | -1 | | -3 | V | VDS=VGS, ID=-250uA | 2 |
| Drain-Source Leakage Current | IDSS | | | -1 | uA | VDS=-30V, VGS=0V | 2 |
| Drain-Source Leakage Current (Tj=70℃) | | | | -25 | uA | VDS=-24V, VGS=0V | 2 |
| Gate-Source Leakage | IGSS | | | 100 | nA | VGS=+20V | 2 |
| Total Gate Charge | Qg | | 18 | 29 | nC | ID=-7A | 2 |
| Input Capacitance | Ciss | | 1175 | 1690 | pF | VGS=0V | 2 |
| Forward On Voltage | VSD | | | -1.2 | V | IS=-2.1A, VGS=0V | 2 |
## CAD (KiCad official)
- Symbol: `AP4435GM`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `ap4435gm-etched.step` / `ap4435gm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap4435gm.step` / `ap4435gm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [APEC Advanced Power Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8579712198471434240) (5 pp, sha256 `72e6e89407010f76`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap4435gm-datasheet.pdf)