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docs ap2172sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers ap2172sg-13: viewers · Ray 1mo ago
ap2172sg-13-etched.fit.json ap2172sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap2172sg-13-etched.glb ap2172sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap2172sg-13-etched.step ap2172sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap2172sg-13.glb Publish 0.1.0 · Ray 1mo ago
ap2172sg-13.kicad_mod Publish 0.1.0 · Ray 1mo ago
ap2172sg-13.kicad_sym Publish 0.1.0 · Ray 1mo ago
ap2172sg-13.lbr Publish 0.1.0 · Ray 1mo ago
ap2172sg-13.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json ap2172sg-13: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 27d ago
README.md ap2172sg-13: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

AP2172SG-13

Diodes Incorporated · AC-DC Controllers and Regulators · SOIC-8

AP2172SG-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground reference.
2 IN power_in Voltage input pin. Supplies both switch channels; operating range 2.7 V to 5.5 V (abs max 6.5 V). Bypass with 0.1 µF and bulk 10 µF near pin.
3 EN1 input Switch 1 enable input. Active high on AP2172 (this variant). VIL ≤ 0.8 V, VIH ≥ 2 V. Input leakage ≤ 1 µA.
4 EN2 input Switch 2 enable input. Active high on AP2172 (this variant). VIL ≤ 0.8 V, VIH ≥ 2 V. Input leakage ≤ 1 µA.
5 FLG2 output Switch 2 over-current and over-temperature fault report. Open-drain output, active low when triggered. Requires external pull-up (typ. 10 kΩ). 7 ms typical blanking time. IFLG = 10 mA max, RFLG ≈ 30 Ω typ.
6 OUT2 power_out Switch 2 voltage output. Delivers up to 1.0 A continuous (1.5 A typ current limit). Bypass with 0.1 µF plus bulk 68 µF at load per USB requirements.
7 OUT1 power_out Switch 1 voltage output. Delivers up to 1.0 A continuous (1.5 A typ current limit). Bypass with 0.1 µF plus bulk 68 µF at load per USB requirements.
8 FLG1 output Switch 1 over-current and over-temperature fault report. Open-drain output, active low when triggered. Requires external pull-up (typ. 10 kΩ). 7 ms typical blanking time. IFLG = 10 mA max, RFLG ≈ 30 Ω typ.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • AP2172SG-13
  • AP2172SG-13MP

CAD (KiCad official)

  • Symbol: AP2172SG-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ap2172sg-13-etched.step / ap2172sg-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2172sg-13.step / ap2172sg-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (17 pp, sha256 e60b7568035123ef, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF