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docs ap2007sper: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ap2007sper: viewers · Ray
ap2007sper-etched.fit.json ap2007sper: one-pass backfill (re-etched, pushed with pre-existing FAIL: pads,symbol) · Ray
ap2007sper-etched.glb ap2007sper: one-pass backfill (re-etched, pushed with pre-existing FAIL: pads,symbol) · Ray
ap2007sper-etched.step ap2007sper: one-pass backfill (re-etched, pushed with pre-existing FAIL: pads,symbol) · Ray
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ap2007sper.glb Publish 0.1.0 · Ray
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ap2007sper.step Publish 0.1.0 · Ray
package.json Publish 0.1.1 · Ray
page.json Publish 0.1.1 · Ray
README.md ap2007sper: specified limits as data (metadata.characteristics, 26 rows from the datasheet) · Ray

AP2007SPER

Wuxi Chipown Micro electronics · DC-DC Converters · ESOP-8

AP2007SPER from Wuxi Chipown Micro electronics, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LX passive Inductor switching node. Connects to one end of the boost inductor (3.3µH typical); tied together with pin 2 internally. Absolute maximum rating -0.3V to +6V. Switches at 1MHz with typical RDS(on) of 52mΩ (NMOS) / 49mΩ (PMOS) and 5A peak current limit.
2 LX passive Inductor switching node (paralleled with pin 1). Connects to one end of the boost inductor. Absolute maximum rating -0.3V to +6V.
3 VIN power_in IC power supply input. Operating input voltage range 2.5V to 5V; absolute maximum -0.3V to +6V. Bypass with ~22µF ceramic capacitor close to the pin.
4 EN input Enable input for the IC. Drive high (VIH ≥ 1.5V) to enable, low (VIL ≤ 0.5V) to disable. Internal pull-down resistor typ 250kΩ (200-300kΩ) to GND. Absolute maximum -0.3V to +6V. Shutdown current <1µA when EN=0.
5 GND power_in IC analog ground. Must be tied to the exposed pad at a single star-ground point.
6 FB input Converter feedback input. Regulated to VFB = 1.227V typ (1.208-1.246V). Input bias current 100nA max. Output voltage set by external divider: R1 = R2 × (VOUT/VFB − 1). Absolute maximum -0.3V to +6V.
7 VOUT power_out Converter output. Regulated boost output (5V typical, adjustable via FB divider). Paralleled with pin 8; bypass with ~22µF×3 ceramic capacitors. Absolute maximum -0.3V to +6V. Leakage <5µA in shutdown.
8 VOUT power_out Converter output (paralleled with pin 7). Absolute maximum -0.3V to +6V.
EP EP power_in Exposed pad on package underside. Internally connected to GND. Must be soldered to the ground plane at a single star-ground point to optimize thermal performance (θJA = 50°C/W, θJC = 10°C/W).

Key specifications

Parameter Value
Manufacturer Wuxi Chipown Micro electronics
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

  • AP2007SPER

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input operation voltage VIN 2.5 5 V 3
Output voltage VOUT 4.925 5 5.075 V Line and Load Regulation in CCM (IL>100mA) VIN=2.5V~4.5V 3
Input quiescent current IIN 50 70 uA VIN=3.6V FB=1.28V, No load, no switching (exclude input current from EN) 3
Shutdown supply current IIN 0.1 1 uA EN=0 3
Switching frequency Fosc 0.7 1 1.3 MHz 3
FB regulation voltage VFB 1.208 1.227 1.246 V 3
Maximum duty cycle Dmax 86 93 96 % FB=0.95V 3
VOUT leakage current IPVOUT_LK 1 5 uA EN=0, VOUT=5V 3
LX leakage current ILX_LK 1 5 uA EN=0, VOUT=5V 3
Switch ON resistance (N-channel) RON-N 52 70 mΩ 3
Switch ON resistance (P-channel) RON-P 49 65 mΩ 3
Peak current limit I_LIM 5 A 3
EN input high level Vih_EN 1.5 5.5 V 3
EN input low level Vil_EN 0 0.5 V 3
EN internal pull-low resistance Rin_EN 200 250 300 kΩ 3
Input supply voltage (absolute maximum) -0.3 6 V 2
LX voltage (absolute maximum) -0.3 6 V 2
VOUT voltage (absolute maximum) -0.3 6 V 2
FB voltage (absolute maximum) -0.3 6 V 2
VIN voltage (absolute maximum) -0.3 6 V 2
EN voltage (absolute maximum) -0.3 6 V 2
Operating temperature range -40 85 °C 3
Storage temperature range -65 150 °C 3
Lead temperature (soldering) 260 °C Soldering, 10s 3
Junction-to-ambient thermal resistance ΘJA 50 °C/W Approximately 1 square of 1oz copper (Note 2) 2
Junction-to-case thermal resistance ΘJC 10 °C/W 2

CAD (KiCad official)

  • Symbol: AP2007SPER
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: ap2007sper-etched.step / ap2007sper-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2007sper.step / ap2007sper.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi Chipown Micro electronics datasheet (7 pp, sha256 6ccd9a511d12a106, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF