component
AOD9N50-VB
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VBsemi Elec MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AOD9N50-VB
VBsemi Elec · MOSFETs · TO-252
AOD9N50-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is rated ±30 V (VGS absolute maximum). |
| 2 | D | passive | Drain terminal, also the thermal tab (RthJC is specified to the drain); drain-source voltage is rated 650 V. |
| 3 | S | passive | Source terminal; reference for gate-source voltage and return path for drain current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 650 | V | 1 | |||
| Gate-Source Voltage | VGS | -30 | 30 | V | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Soldering Recommendations (Peak Temperature) | 300 | °C | for 10 s, 1.6 mm from case | 1 | |||
| Drain-Source Breakdown Voltage | VDS | 650 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Gate-Source Threshold Voltage (N) | VGS(th) | 2 | 4 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ± 20 V | 2 | |
| Gate-Source Leakage | IGSS | -1 | 1 | μA | VGS = ± 30 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS = 650 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | μA | VDS = 520 V, VGS = 0 V, TJ = 125 °C | 2 | ||
| Diode Forward Voltage | VSD | 1.5 | V | TJ = 25 °C, IS = 4 A, VGS = 0 V | 2 | ||
| Maximum Junction-to-Ambient | RthJA | 63 | °C/W | 2 | |||
| Maximum Junction-to-Case (Drain) | RthJC | 0.6 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
AOD9N50-VB - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
aod9n50-vb-etched.step/aod9n50-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aod9n50-vb.step/aod9n50-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (8 pp, sha256
67360e399edc6b7b, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AOD9N50-VB
**VBsemi Elec** · MOSFETs · TO-252
AOD9N50-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is rated ±30 V (VGS absolute maximum). |
| 2 | D | passive | Drain terminal, also the thermal tab (RthJC is specified to the drain); drain-source voltage is rated 650 V. |
| 3 | S | passive | Source terminal; reference for gate-source voltage and return path for drain current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 650 | V | | 1 |
| Gate-Source Voltage | VGS | -30 | | 30 | V | | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Soldering Recommendations (Peak Temperature) | | | | 300 | °C | for 10 s, 1.6 mm from case | 1 |
| Drain-Source Breakdown Voltage | VDS | 650 | | | V | VGS = 0 V, ID = 250 μA | 2 |
| Gate-Source Threshold Voltage (N) | VGS(th) | 2 | | 4 | V | VDS = VGS, ID = 250 μA | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VGS = ± 20 V | 2 |
| Gate-Source Leakage | IGSS | -1 | | 1 | μA | VGS = ± 30 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS = 650 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | μA | VDS = 520 V, VGS = 0 V, TJ = 125 °C | 2 |
| Diode Forward Voltage | VSD | | | 1.5 | V | TJ = 25 °C, IS = 4 A, VGS = 0 V | 2 |
| Maximum Junction-to-Ambient | RthJA | | | 63 | °C/W | | 2 |
| Maximum Junction-to-Case (Drain) | RthJC | | | 0.6 | °C/W | | 2 |
## CAD (KiCad official)
- Symbol: `AOD9N50-VB`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `aod9n50-vb-etched.step` / `aod9n50-vb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aod9n50-vb.step` / `aod9n50-vb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [VBsemi Elec datasheet](docs/aod9n50-vb-datasheet.pdf) (8 pp, sha256 `67360e399edc6b7b`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aod9n50-vb-datasheet.pdf)