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AMC0311SDWVR

Texas Instruments · IC · SOIC-8

AMC0311SDWVR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in High-side power supply, operating range 3V to 5.5V relative to GND1 (absolute max 6.5V); see Power Supply Recommendations for decoupling.
2 INP input Analog input of the amplifier; linear input range VINP - VSNSN of 0V to 2.25V.
3 SNSN input GND1 sense pin and inverting analog input to the amplifier; connect to GND1.
4 GND1 power_in High-side analog ground.
5 GND2 power_in Low-side analog ground.
6 REFIN input Reference input whose voltage is added as an offset to the output voltage; connect to a low-impedance source (0V to VDD2) or to GND2 if not used.
7 OUT output Single-ended analog output with fixed gain of 1V/V, supports up to 500pF capacitive load and a resistive load of at least 10kΩ to GND2.
8 VDD2 power_in Low-side power supply, operating range 3V to 5.5V relative to GND2 (absolute max 6.5V); see Power Supply Recommendations for decoupling.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-side power supply VDD1 3 5 5.5 V VDD1 to GND1 4
Low-side power supply VDD2 3 3.3 5.5 V VDD2 to GND2 4
Specified linear input voltage VFSR 0 2.25 V VIN = VINP, VSNSN 4
Reference input voltage VREFIN 0 V REFIN to GND2 4
Capacitive load CLOAD 500 pF OUT to GND2 4
Specified ambient temperature TA -40 125 °C 4
High-side power supply voltage VDD1 -0.3 6.5 V VDD1 to GND1 4
Low-side power supply voltage VDD2 -0.3 6.5 V VDD2 to GND2 4
Input current -10 10 mA Continuous, any pin except power-supply pins 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human-body model per ANSI/ESDA/JEDEC JS-001 4
ESD CDM V(ESD) -1000 1000 V Charged-device model per ANSI/ESDA/JEDEC JS-002 4
Input impedance RINP 0.05 2.4 GΩ INP pin to GND1 13
Input bias current IIB, INP -10 3 10 nA INP pin, INP = GND1 13
Common-mode transient immunity CMTI 150 V/ns 13
REFIN DC current out of pin IREFIN 3.7 4.45 5.2 µA VREFIN = 300mV, TA = 25℃ 13
REFIN DC current out of pin IREFIN 3.2 3.85 4.5 µA VREFIN = 450mV, TA = 25℃ 13
Input offset voltage VOS -1 0.15 1 mV VOS = (VOUT, VREFIN), INP = SNSN = GND1, VREFIN = 250mV, TA = 25°C 13
Input offset thermal drift TCVOS -30 3 30 µV/°C 13
Gain error EG -0.25 0.04 0.25 % TA = 25℃ 13
Gain error drift TCEG -50 5 50 ppm/°C 13
Nonlinearity -0.08 0.002 0.08 % 13
Output bandwidth BW 120 145 kHz 13
Total harmonic distortion THD -83 -73 dB VINP = 2VPP, VINP > 0V, fIN = 10kHz 13
Signal-to-noise ratio SNR 75 80 dB VINP = 2.25VPP, fINP = 1kHz, BW = 10kHz 13
High-side supply current IDD1 4.4 5.6 mA 13
Low-side supply current IDD2 4.8 7.4 mA 13
High-side undervoltage threshold rising VDD1UV 2.4 2.6 2.8 V VDD1 rising 13
High-side undervoltage threshold falling VDD1UV 1.9 2.05 2.2 V VDD1 falling 13
Low-side undervoltage threshold rising VDD2UV 2.3 2.5 2.7 V VDD2 rising 14
Low-side undervoltage threshold falling VDD2UV 1.9 2.05 2.2 V VDD2 falling 14
VINP to VOUT signal delay (50%, 50%) 2.9 3.2 µs Unfiltered output 14
Analog settling time tAS 20 100 µs VDD1 step to 3.0V with VDD2 ≥ 3.0V to VOUT valid, 0.1% settling 14
Output saturation voltage VOUT, SAT 150 mV INP = GND1, VREFIN = 3.3V, IOUT = -1mA (sinking) 13
Input capacitance CIN 2 pF 13
Output resistance ROUT 0.2 Ω 13
Output short-circuit current 11 mA INP = GND1, output shorted to either GND2 or VDD2 13
Output noise 180 µVRMS INP = GND1, BW = 50kHz 13
Input impedance thermal drift TCIREFIN 235 ppm/℃ 13
Output rise time tr 2.6 µs 10% to 90%, unfiltered output 14
Output fall time tf 2.6 µs 10% to 90%, unfiltered output 14
Junction-to-ambient thermal resistance RθJA 102.8 °C/W DWV (SOIC) 8 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 45.1 °C/W DWV (SOIC) 8 pins 6
Junction-to-board thermal resistance RθJB 63 °C/W DWV (SOIC) 8 pins 6
Maximum power dissipation (both sides) PD 72 mW VDD1 = VDD2 = 5.5V 6

CAD (KiCad official)

  • Symbol: AMC0311SDWVR
  • Footprint: Package_SO:SOIC-8_7.5x5.85mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: amc0311sdwvr-etched.step / amc0311sdwvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); amc0311sdwvr.step / amc0311sdwvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 bf0e850ae5ce0d4f, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF