AK5578EN

{
  "slug": "ak5578en",
  "version": "0.1.0",
  "type": "component",
  "description": "Asahi Kasei Microdevices Digital To Analog Converters (DACs), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ak5578en",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ak5578en.kicad_sym",
    "ak5578en.kicad_mod",
    "ak5578en.glb",
    "ak5578en.step",
    "ak5578en.lbr",
    "docs/hero.png",
    "docs/ak5578en-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ak5578en-hero.glb",
    "ak5578en-hero.overlay.json",
    "ak5578en-etched.glb"
  ],
  "component": {
    "mpn": "AK5578EN",
    "manufacturer": "Asahi Kasei Microdevices",
    "package": "VQFN-64-EP(9x9)",
    "pin_count": 65,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/1fbbe3131111836fa331d61a0dc006ec.pdf",
    "parts": {
      "symbol": "ak5578en.kicad_sym",
      "footprint": "ak5578en.kicad_mod",
      "model_3d": "ak5578en-hero.glb",
      "model_3d_plain": "ak5578en-etched.glb",
      "model_3d_step": "ak5578en-etched.step",
      "model_3d_step_plain": "ak5578en.step",
      "lbr": "ak5578en.lbr"
    },
    "distributor_links": {
      "lcsc": "C2651626",
      "digikey": "974-1119-2-ND",
      "mouser": "412-AK5578EN"
    },
    "distributor_check": {
      "checked_at": "2026-10-29T02:23:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "974-1119-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "412-AK5578EN",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVSS1",
        "type": "power_in",
        "description": "Analog ground for the AIN1-4 channels."
      },
      {
        "number": "2",
        "name": "AVDD1",
        "type": "power_in",
        "description": "Analog power supply for the AIN1-4 channels, 4.75-5.25 V (5.0 V typ)."
      },
      {
        "number": "3",
        "name": "AIN3P",
        "type": "input",
        "description": "Channel 3 positive differential analog input."
      },
      {
        "number": "4",
        "name": "AIN3N",
        "type": "input",
        "description": "Channel 3 negative differential analog input."
      },
      {
        "number": "5",
        "name": "VREFL2",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 3-4, normally connected to AVSS."
      },
      {
        "number": "6",
        "name": "VREFH2",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 3-4; must not exceed AVDD+0.1 V."
      },
      {
        "number": "7",
        "name": "AIN4N",
        "type": "input",
        "description": "Channel 4 negative differential analog input."
      },
      {
        "number": "8",
        "name": "AIN4P",
        "type": "input",
        "description": "Channel 4 positive differential analog input."
      },
      {
        "number": "9",
        "name": "AIN5P",
        "type": "input",
        "description": "Channel 5 positive differential analog input."
      },
      {
        "number": "10",
        "name": "AIN5N",
        "type": "input",
        "description": "Channel 5 negative differential analog input."
      },
      {
        "number": "11",
        "name": "VREFH3",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 5-6; must not exceed AVDD+0.1 V."
      },
      {
        "number": "12",
        "name": "VREFL3",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 5-6, normally connected to AVSS."
      },
      {
        "number": "13",
        "name": "AIN6N",
        "type": "input",
        "description": "Channel 6 negative differential analog input."
      },
      {
        "number": "14",
        "name": "AIN6P",
        "type": "input",
        "description": "Channel 6 positive differential analog input."
      },
      {
        "number": "15",
        "name": "AVDD2",
        "type": "power_in",
        "description": "Analog power supply for the AIN5-8 channels, 4.75-5.25 V (5.0 V typ)."
      },
      {
        "number": "16",
        "name": "AVSS2",
        "type": "power_in",
        "description": "Analog ground for the AIN5-8 channels."
      },
      {
        "number": "17",
        "name": "AIN7P",
        "type": "input",
        "description": "Channel 7 positive differential analog input."
      },
      {
        "number": "18",
        "name": "AIN7N",
        "type": "input",
        "description": "Channel 7 negative differential analog input."
      },
      {
        "number": "19",
        "name": "VREFH4",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 7-8; must not exceed AVDD+0.1 V."
      },
      {
        "number": "20",
        "name": "VREFL4",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 7-8, normally connected to AVSS."
      },
      {
        "number": "21",
        "name": "AIN8N",
        "type": "input",
        "description": "Channel 8 negative differential analog input."
      },
      {
        "number": "22",
        "name": "AIN8P",
        "type": "input",
        "description": "Channel 8 positive differential analog input."
      },
      {
        "number": "23",
        "name": "TEST",
        "type": "input",
        "description": "TEST enable pin, internally pulled down by 100 kΩ; connect to DVSS when unused."
      },
      {
        "number": "24",
        "name": "MCLK",
        "type": "input",
        "description": "Master clock input pin."
      },
      {
        "number": "25",
        "name": "TVDD",
        "type": "power_in",
        "description": "Digital I/O buffer and LDO power supply, 1.7-1.98 V when LDOE is L or 3.0-3.6 V when LDOE is H."
      },
      {
        "number": "26",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground pin; must be connected to the same analog ground plane as AVSS1/2."
      },
      {
        "number": "27",
        "name": "VDD18",
        "type": "power_in",
        "description": "Digital core power supply, 1.7-1.98 V when LDOE is L; when LDOE is H it is the LDO stabilization capacitor connection (Hi-Z, pulled down by 500 Ω)."
      },
      {
        "number": "28",
        "name": "PDN",
        "type": "input",
        "description": "Reset and power-down pin: L resets and powers down the device, H enables normal operation."
      },
      {
        "number": "29",
        "name": "PW0",
        "type": "input",
        "description": "Power management pin and channel summation select pin (bit 0)."
      },
      {
        "number": "30",
        "name": "PW1",
        "type": "input",
        "description": "Power management pin and channel summation select pin (bit 1)."
      },
      {
        "number": "31",
        "name": "PW2",
        "type": "input",
        "description": "Power management pin and channel summation select pin (bit 2)."
      },
      {
        "number": "32",
        "name": "MSN",
        "type": "input",
        "description": "Master/slave select: L selects slave mode, H selects master mode."
      },
      {
        "number": "33",
        "name": "BICK/DCLK",
        "type": "bidirectional",
        "description": "Audio serial bit clock: input in PCM slave mode and output in PCM master mode; DSD clock output (DCLK) in DSD mode; internally pulled down by 100 kΩ."
      },
      {
        "number": "34",
        "name": "LRCK/DSDOL1",
        "type": "bidirectional",
        "description": "Channel clock: input in PCM slave mode and output in PCM master mode; DSD serial data output for AIN1 in DSD mode; internally pulled down by 100 kΩ."
      },
      {
        "number": "35",
        "name": "TDMIN/DSDOR1",
        "type": "input",
        "description": "TDM data input in PCM mode (internally pulled down by 100 kΩ); DSD serial data output for AIN2 in DSD mode."
      },
      {
        "number": "36",
        "name": "SDTO1/DSDOL2",
        "type": "output",
        "description": "Serial audio data output for AIN1 and AIN2 in PCM mode; DSD serial data output for AIN3 in DSD mode; L in power-down."
      },
      {
        "number": "37",
        "name": "SDTO2/DSDOR2",
        "type": "output",
        "description": "Serial audio data output for AIN3 and AIN4 in PCM mode; DSD serial data output for AIN4 in DSD mode; L in power-down."
      },
      {
        "number": "38",
        "name": "SDTO3/DSDOL3",
        "type": "output",
        "description": "Serial audio data output for AIN5 and AIN6 in PCM mode; DSD serial data output for AIN5 in DSD mode; L in power-down."
      },
      {
        "number": "39",
        "name": "SDTO4/DSDOR3",
        "type": "output",
        "description": "Serial audio data output for AIN7 and AIN8 in PCM mode; DSD serial data output for AIN6 in DSD mode; L in power-down."
      },
      {
        "number": "40",
        "name": "DSDOL4",
        "type": "output",
        "description": "DSD serial data output for AIN7; L in power-down."
      },
      {
        "number": "41",
        "name": "DSDOR4",
        "type": "output",
        "description": "DSD serial data output for AIN8; L in power-down."
      },
      {
        "number": "42",
        "name": "OVF",
        "type": "output",
        "description": "Analog input overflow flag output; L in power-down."
      },
      {
        "number": "43",
        "name": "CKS0/SDA/CDTI",
        "type": "input",
        "description": "Clock mode select pin; serves as SDA (I2C control data I/O, Hi-Z in power-down) or CDTI (3-wire control data input) depending on control mode."
      },
      {
        "number": "44",
        "name": "CKS1/CAD0_I2C/CSN",
        "type": "input",
        "description": "Clock mode select pin; serves as chip address 0 in I2C mode or CSN chip select in 3-wire mode."
      },
      {
        "number": "45",
        "name": "CKS2/SCL/CCLK",
        "type": "input",
        "description": "Clock mode select pin; serves as SCL (I2C control clock) or CCLK (3-wire control clock) depending on control mode."
      },
      {
        "number": "46",
        "name": "CKS3/CAD1",
        "type": "input",
        "description": "Clock mode select pin; serves as chip address 1 in I2C or 3-wire control mode."
      },
      {
        "number": "47",
        "name": "SLOW/DCKB",
        "type": "input",
        "description": "Slow roll-off digital filter select in PCM mode; DCLK polarity select in DSD mode."
      },
      {
        "number": "48",
        "name": "SD/PMOD",
        "type": "input",
        "description": "Short delay digital filter select in PCM mode; DSD phase modulation mode select in DSD mode."
      },
      {
        "number": "49",
        "name": "DIF0/DSDSEL0",
        "type": "input",
        "description": "Audio data format select in PCM mode (L: MSB justified, H: I2S); DSD sampling rate control in DSD mode."
      },
      {
        "number": "50",
        "name": "DIF1/DSDSEL1",
        "type": "input",
        "description": "Audio data format select in PCM mode (L: 24-bit, H: 32-bit); DSD sampling rate control in DSD mode."
      },
      {
        "number": "51",
        "name": "TDM0",
        "type": "input",
        "description": "TDM interface format select; must be fixed to L in DSD mode."
      },
      {
        "number": "52",
        "name": "TDM1",
        "type": "input",
        "description": "TDM interface format select; must be fixed to L in DSD mode."
      },
      {
        "number": "53",
        "name": "PSN/CAD0_SPI",
        "type": "input",
        "description": "Control mode select when I2C pin is H (L: I2C bus control, H: parallel control); chip address 0 in 3-wire mode when I2C pin is L."
      },
      {
        "number": "54",
        "name": "I2C",
        "type": "input",
        "description": "Control mode select: L selects 3-wire serial control, H selects I2C bus or parallel control."
      },
      {
        "number": "55",
        "name": "DP",
        "type": "input",
        "description": "DSD mode enable: L selects PCM mode, H selects DSD mode."
      },
      {
        "number": "56",
        "name": "HPFE/DCKS",
        "type": "input",
        "description": "High-pass filter enable in PCM mode (L: disable, H: enable); master clock frequency select (DCKS) in DSD mode."
      },
      {
        "number": "57",
        "name": "LDOE",
        "type": "input",
        "description": "LDO enable: L disables the internal LDO, H enables it; internally pulled down by 100 kΩ."
      },
      {
        "number": "58",
        "name": "ODP",
        "type": "input",
        "description": "Optimal data placement mode select pin."
      },
      {
        "number": "59",
        "name": "AIN1P",
        "type": "input",
        "description": "Channel 1 positive differential analog input."
      },
      {
        "number": "60",
        "name": "AIN1N",
        "type": "input",
        "description": "Channel 1 negative differential analog input."
      },
      {
        "number": "61",
        "name": "VREFL1",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 1-2, normally connected to AVSS."
      },
      {
        "number": "62",
        "name": "VREFH1",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 1-2; must not exceed AVDD+0.1 V."
      },
      {
        "number": "63",
        "name": "AIN2N",
        "type": "input",
        "description": "Channel 2 negative differential analog input."
      },
      {
        "number": "64",
        "name": "AIN2P",
        "type": "input",
        "description": "Channel 2 positive differential analog input."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Exposed pad on the package back face has no pin number in the datasheet. It must be left open or con; The datasheet names the package '64QFN' / '64-pin QFN' and gives a 9.00 x 9.00 mm outline; it does n; Multiplexed pins are typed by their first-listed function. Their type can differ by mode: BICK/DCLK ",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 20,
        "cost_usd": 0.1235,
        "at": "2026-10-29T02:23:06"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/1fbbe3131111836fa331d61a0dc006ec.pdf",
        "pages": 72,
        "sha256": "5b9b48873d5535ce",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ak5578en.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ak5578en-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "28d5713b00bb624db7806aa912fa0f43acf5ee03a66f4584cd59388f81166fb0",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "64-pin QFN",
      "source_page": 70,
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.85,
        "range_mm": [
          null,
          null
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ak5578en.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}