component
AK5552VN
Public Made by Adomby adom
Asahi Kasei Microdevices Digital To Analog Converters (DACs), QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ak5552vn",
"title": "AK5552VN",
"brief": "Asahi Kasei Microdevices Digital To Analog Converters (DACs), QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"adc-dac-data conversion",
"ak5552vn",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "AK5552VN",
"manufacturer": "Asahi Kasei Microdevices",
"package": "QFN-48-EP(7x7)",
"pin_count": 49,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/6e494812eb76fcadd6755abc1a5c4c23.pdf",
"parts": {
"symbol": "ak5552vn.kicad_sym",
"footprint": "ak5552vn.kicad_mod",
"model_3d": "ak5552vn-hero.glb",
"model_3d_plain": "ak5552vn-etched.glb",
"model_3d_step": "ak5552vn-etched.step",
"model_3d_step_plain": "ak5552vn.step",
"lbr": "ak5552vn.lbr"
},
"distributor_links": {
"lcsc": "C2651617",
"digikey": "974-1125-2-ND",
"mouser": "412-AK5552VN"
},
"distributor_check": {
"checked_at": "2026-10-28T21:07:26Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "974-1125-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "412-AK5552VN",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "NC",
"type": "unconnected",
"description": "No internal bonding; connect to AVSS."
},
{
"number": "2",
"name": "VREFL1",
"type": "input",
"description": "ADC low-level voltage reference input; must be connected to AVSS."
},
{
"number": "3",
"name": "VREFH1",
"type": "input",
"description": "ADC high-level voltage reference input; must not exceed AVDD+0.1 V and is specified at 4.5-5.5 V."
},
{
"number": "4",
"name": "AIN2N",
"type": "input",
"description": "Channel 2 negative analog input pin."
},
{
"number": "5",
"name": "AIN2P",
"type": "input",
"description": "Channel 2 positive analog input pin."
},
{
"number": "6",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply for AIN1-2, 4.5-5.5 V."
},
{
"number": "7",
"name": "AVSS",
"type": "power_in",
"description": "Analog ground for AIN1-2."
},
{
"number": "8",
"name": "TESTIN1",
"type": "passive",
"description": "Test input pin 1; the datasheet gives no operating function for this pin."
},
{
"number": "9",
"name": "TESTIN2",
"type": "passive",
"description": "Test input pin 2; the datasheet gives no operating function for this pin."
},
{
"number": "10",
"name": "TESTIN3",
"type": "passive",
"description": "Test input pin 3; the datasheet gives no operating function for this pin."
},
{
"number": "11",
"name": "TESTIN4",
"type": "passive",
"description": "Test input pin 4; the datasheet gives no operating function for this pin."
},
{
"number": "12",
"name": "NC",
"type": "unconnected",
"description": "No internal bonding; connect to AVSS."
},
{
"number": "13",
"name": "TESTIN5",
"type": "passive",
"description": "Test input pin 5; the datasheet gives no operating function for this pin."
},
{
"number": "14",
"name": "TESTIN6",
"type": "passive",
"description": "Test input pin 6; the datasheet gives no operating function for this pin."
},
{
"number": "15",
"name": "TEST",
"type": "input",
"description": "TEST enable pin."
},
{
"number": "16",
"name": "MCLK",
"type": "input",
"description": "Master clock input pin."
},
{
"number": "17",
"name": "TVDD",
"type": "power_in",
"description": "Digital I/O buffer and LDO power supply, 1.7-1.98 V when LDOE is L or 3.0-3.6 V when LDOE is H."
},
{
"number": "18",
"name": "DVSS",
"type": "power_in",
"description": "Digital ground pin; DVSS and AVSS must be connected to the same analog ground plane."
},
{
"number": "19",
"name": "VDD18",
"type": "power_in",
"description": "Digital core power supply, 1.7-1.98 V when LDOE is L; when LDOE is H this pin is the LDO stabilization capacitor connection and cannot supply external circuits."
},
{
"number": "20",
"name": "PDN",
"type": "input",
"description": "Reset and power-down pin: L resets and powers down the device, H is normal operation."
},
{
"number": "21",
"name": "PW0",
"type": "input",
"description": "Power management pin and channel summation select pin 1."
},
{
"number": "22",
"name": "PW1",
"type": "input",
"description": "Power management pin and channel summation select pin 2."
},
{
"number": "23",
"name": "PW2",
"type": "input",
"description": "Power management pin and channel summation select pin 3."
},
{
"number": "24",
"name": "MSN",
"type": "input",
"description": "Master/slave select pin."
},
{
"number": "25",
"name": "BICK/DCLK",
"type": "bidirectional",
"description": "BICK is the audio serial data clock input in PCM slave mode and output in PCM master mode; DCLK is the DSD clock output in DSD mode; pin is pulled down by 100 kΩ internally."
},
{
"number": "26",
"name": "LRCK/DSDOL1",
"type": "bidirectional",
"description": "LRCK is the channel clock input in PCM slave mode and output in PCM master mode; DSDOL1 is the AIN1 serial data output in DSD mode; pin is pulled down by 100 kΩ internally."
},
{
"number": "27",
"name": "TDMIN/DSDOR1",
"type": "bidirectional",
"description": "TDMIN is the TDM data input in PCM mode; DSDOR1 is the AIN2 serial data output in DSD mode; pin is pulled down by 100 kΩ internally."
},
{
"number": "28",
"name": "SDTO1",
"type": "output",
"description": "Audio serial data output for AIN1 and AIN2 in PCM mode; output is L when powered down."
},
{
"number": "29",
"name": "TESTO1",
"type": "output",
"description": "Test output pin 1; high-impedance when powered down."
},
{
"number": "30",
"name": "OVF",
"type": "output",
"description": "Analog input overflow flag output; goes H when an analog input overflows (more than -0.3 dBFS) and is L when powered down."
},
{
"number": "31",
"name": "CKS0/SDA/CDTI",
"type": "bidirectional",
"description": "CKS0 is the clock mode select input; SDA is the I2C control data I/O (high-impedance when powered down); CDTI is the control data input in 3-wire mode."
},
{
"number": "32",
"name": "CKS1/CAD0_I2C/CSN",
"type": "input",
"description": "CKS1 is the clock mode select input; CAD0_I2C is the I2C chip address 0 pin; CSN is the 3-wire chip select input."
},
{
"number": "33",
"name": "CKS2/SCL/CCLK",
"type": "input",
"description": "CKS2 is the clock mode select input; SCL is the I2C control clock pin; CCLK is the 3-wire control clock input."
},
{
"number": "34",
"name": "CKS3/CAD1",
"type": "input",
"description": "CKS3 is the clock mode select input; CAD1 is the chip address 1 pin in I2C or 3-wire control mode."
},
{
"number": "35",
"name": "SLOW/DCKB",
"type": "input",
"description": "SLOW selects the slow roll-off digital filter in PCM mode; DCKB sets the DCLK polarity in DSD mode."
},
{
"number": "36",
"name": "SD/PMOD",
"type": "input",
"description": "SD selects the short-delay digital filter in PCM mode; PMOD selects the DSD phase modulation mode."
},
{
"number": "37",
"name": "DIF0/DSDSEL0",
"type": "input",
"description": "DIF0 selects the PCM audio format (L: MSB justified, H: I2S); DSDSEL0 controls the DSD sampling rate."
},
{
"number": "38",
"name": "DIF1/DSDSEL1",
"type": "input",
"description": "DIF1 selects the PCM data length (L: 24-bit, H: 32-bit); DSDSEL1 controls the DSD sampling rate."
},
{
"number": "39",
"name": "TDM0",
"type": "input",
"description": "TDM interface format select; must be fixed to L in DSD mode."
},
{
"number": "40",
"name": "TDM1",
"type": "input",
"description": "TDM interface format select; must be fixed to L in DSD mode."
},
{
"number": "41",
"name": "PSN/CAD0_SPI",
"type": "input",
"description": "PSN selects I2C bus (L) or parallel (H) control when the I2C pin is H; CAD0_SPI is the chip address 0 pin in 3-wire mode when the I2C pin is L."
},
{
"number": "42",
"name": "I2C",
"type": "input",
"description": "Control mode select: L selects 3-wire serial control, H selects I2C bus or parallel control."
},
{
"number": "43",
"name": "DP",
"type": "input",
"description": "DSD mode enable: L selects PCM mode, H selects DSD mode."
},
{
"number": "44",
"name": "HPFE/DCKS",
"type": "input",
"description": "HPFE enables the digital high-pass filter in PCM mode (L: disable, H: enable); DCKS selects the master clock frequency in DSD mode."
},
{
"number": "45",
"name": "LDOE",
"type": "input",
"description": "LDO enable: L disables and H enables the internal LDO; pin is pulled down by 100 kΩ internally."
},
{
"number": "46",
"name": "ODP",
"type": "input",
"description": "Optimal data placement mode enable pin."
},
{
"number": "47",
"name": "AIN1P",
"type": "input",
"description": "Channel 1 positive analog input pin."
},
{
"number": "48",
"name": "AIN1N",
"type": "input",
"description": "Channel 1 negative analog input pin."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Multi-function pins with both input and output functions in different modes; type set to bidirection; VDD18 is a supply input when LDOE is L but an LDO stabilization capacitor connection when LDOE is H;; Test input pins have no I/O direction or function given in the datasheet (listed with '-'); typed pa",
"exposed pad 49 added from the footprint"
],
"pages_sent": 20,
"cost_usd": 0.1021,
"at": "2026-10-28T21:06:54"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/6e494812eb76fcadd6755abc1a5c4c23.pdf",
"pages": 70,
"sha256": "fe291e7aec8567ce",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ak5552vn.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ak5552vn-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "854cbfa7d97d0d0a13bd9c8c81ed7b1f20b11e42c3113af395828439b58d9d4e",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "48-pin QFN",
"source_page": 68,
"D": {
"nom_mm": 7,
"range_mm": [
null,
null
]
},
"E1": {
"nom_mm": 7,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.85,
"range_mm": [
null,
null
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ak5552vn.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Asahi Kasei Microdevices",
"Package": "QFN-48-EP(7x7)",
"Category": "ADC/DAC/Data Conversion",
"Pins": "49"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "fe291e7aec8567ce31560a916461ac47ba4e0bd2198e742efb3afac15d948c75",
"rows": [
{
"name": "Analog supply (AVDD pin) absolute maximum",
"symbol": "AVDDam",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6,
"conditions": "VSS=0 V; Note 3",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital interface supply (TVDD pin) absolute maximum",
"symbol": "TVDDam",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 4,
"conditions": "VSS=0 V; Note 3",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital core supply (VDD18 pin) absolute maximum",
"symbol": "VDD18am",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 2.5,
"conditions": "VSS=0 V; Note 3, Note 4 (LDOE pin = L)",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Input current (any pin except supplies)",
"symbol": "IIN",
"kind": "absolute_maximum",
"unit": "mA",
"min": null,
"typ": null,
"max": 10,
"conditions": "",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Analog input voltage (AIN1-4P, AIN1-4N pins)",
"symbol": "VINA",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": null,
"conditions": "Printed max is AVDD+0.3 V; VSS=0 V",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital input voltage",
"symbol": "VIND",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": null,
"conditions": "Printed max is TVDD+0.3 V; VSS=0 V",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Ambient temperature, power applied (back tab connected to VSS)",
"symbol": "Ta",
"kind": "absolute_maximum",
"unit": "°C",
"min": -40,
"typ": null,
"max": 105,
"conditions": "Power applied; back tab connected to VSS",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Ambient temperature, power applied (back tab open)",
"symbol": "Ta",
"kind": "absolute_maximum",
"unit": "°C",
"min": -40,
"typ": null,
"max": 70,
"conditions": "Power applied; back tab open",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Storage temperature",
"symbol": "Tstg",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Analog supply (AVDD pin)",
"symbol": "AVDD",
"kind": "recommended_operating",
"unit": "V",
"min": 4.5,
"typ": 5,
"max": 5.5,
"conditions": "LDOE pin = L; Note 5",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital interface supply (TVDD pin), LDOE pin = L",
"symbol": "TVDD",
"kind": "recommended_operating",
"unit": "V",
"min": 1.7,
"typ": 1.8,
"max": 1.98,
"conditions": "LDOE pin = L; Note 6: must not exceed VDD18±0.1 V",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital core supply (VDD18 pin), LDOE pin = L",
"symbol": "VDD18",
"kind": "recommended_operating",
"unit": "V",
"min": 1.7,
"typ": 1.8,
"max": 1.98,
"conditions": "LDOE pin = L",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital interface supply (TVDD pin), LDOE pin = H",
"symbol": "TVDD",
"kind": "recommended_operating",
"unit": "V",
"min": 3,
"typ": 3.3,
"max": 3.6,
"conditions": "LDOE pin = H; Note 7",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Voltage reference high (VREFH1)",
"symbol": "VREFH1",
"kind": "recommended_operating",
"unit": "V",
"min": 4.5,
"typ": 5,
"max": 5.5,
"conditions": "Note 8: must not exceed AVDD+0.1 V",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Input voltage (full scale, differential)",
"symbol": "",
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