component
AK5534VN
Public Made by Adomby adom
Asahi Kasei Microdevices Pre-ordered Chips, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ak5534vn",
"version": "0.1.0",
"type": "component",
"description": "Asahi Kasei Microdevices Pre-ordered Chips, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface ics",
"ak5534vn",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ak5534vn.kicad_sym",
"ak5534vn.kicad_mod",
"ak5534vn.glb",
"ak5534vn.step",
"ak5534vn.lbr",
"docs/hero.png",
"docs/ak5534vn-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ak5534vn-hero.glb",
"ak5534vn-hero.overlay.json",
"ak5534vn-etched.glb"
],
"component": {
"mpn": "AK5534VN",
"manufacturer": "Asahi Kasei Microdevices",
"package": "QFN-48-EP(7x7)",
"pin_count": 49,
"category": "Interface ICs",
"subcategory": "Pre-ordered Chips",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/5b607938ca0295b3cd9286ac2482cc0c.pdf",
"parts": {
"symbol": "ak5534vn.kicad_sym",
"footprint": "ak5534vn.kicad_mod",
"model_3d": "ak5534vn-hero.glb",
"model_3d_plain": "ak5534vn-etched.glb",
"model_3d_step": "ak5534vn-etched.step",
"model_3d_step_plain": "ak5534vn.step",
"lbr": "ak5534vn.lbr"
},
"distributor_links": {
"lcsc": "C2667243",
"digikey": "974-1122-2-ND",
"mouser": "412-AK5534VN"
},
"distributor_check": {
"checked_at": "2026-10-30T11:57:16Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "974-1122-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "412-AK5534VN",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "NC",
"type": "unconnected",
"description": "No internal bonding; connect to AVSS."
},
{
"number": "2",
"name": "VREFL1",
"type": "input",
"description": "ADC low-level voltage reference input, normally connected to AVSS."
},
{
"number": "3",
"name": "VREFH1",
"type": "input",
"description": "ADC high-level voltage reference input, 3.0-3.6 V and not above AVDD+0.1 V."
},
{
"number": "4",
"name": "AIN2N",
"type": "input",
"description": "Channel 2 negative analog input."
},
{
"number": "5",
"name": "AIN2P",
"type": "input",
"description": "Channel 2 positive analog input."
},
{
"number": "6",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply for AIN1-4, 3.0-3.6 V."
},
{
"number": "7",
"name": "AVSS",
"type": "power_in",
"description": "Analog ground for AIN1-4."
},
{
"number": "8",
"name": "AIN3P",
"type": "input",
"description": "Channel 3 positive analog input."
},
{
"number": "9",
"name": "AIN3N",
"type": "input",
"description": "Channel 3 negative analog input."
},
{
"number": "10",
"name": "VREFH2",
"type": "input",
"description": "ADC high-level voltage reference input, 3.0-3.6 V and not above AVDD+0.1 V."
},
{
"number": "11",
"name": "VREFL2",
"type": "input",
"description": "ADC low-level voltage reference input, normally connected to AVSS."
},
{
"number": "12",
"name": "NC",
"type": "unconnected",
"description": "No internal bonding; connect to AVSS."
},
{
"number": "13",
"name": "AIN4N",
"type": "input",
"description": "Channel 4 negative analog input."
},
{
"number": "14",
"name": "AIN4P",
"type": "input",
"description": "Channel 4 positive analog input."
},
{
"number": "15",
"name": "TEST",
"type": "input",
"description": "Test enable pin; connect to DVSS when unused."
},
{
"number": "16",
"name": "MCLK",
"type": "input",
"description": "Master clock input."
},
{
"number": "17",
"name": "TVDD",
"type": "power_in",
"description": "Digital I/O buffer and LDO supply, 1.7-1.98 V (LDOE=L) or 3.0-3.6 V (LDOE=H)."
},
{
"number": "18",
"name": "DVSS",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "19",
"name": "VDD18",
"type": "power_in",
"description": "Digital core supply input 1.7-1.98 V when LDOE=L, or LDO stabilization capacitor connection when LDOE=H."
},
{
"number": "20",
"name": "PDN",
"type": "input",
"description": "Reset and power-down pin: L = reset/power down, H = normal operation."
},
{
"number": "21",
"name": "PW0",
"type": "input",
"description": "Power management and channel summation select pin 1."
},
{
"number": "22",
"name": "PW1",
"type": "input",
"description": "Power management and channel summation select pin 2."
},
{
"number": "23",
"name": "PW2",
"type": "input",
"description": "Power management and channel summation select pin 3."
},
{
"number": "24",
"name": "MSN",
"type": "input",
"description": "Master/slave select pin."
},
{
"number": "25",
"name": "BICK/DCLK",
"type": "bidirectional",
"description": "Audio serial data clock input (PCM slave) or output (PCM master), or DSD clock output in DSD mode; internal 100 kΩ pull-down."
},
{
"number": "26",
"name": "LRCK/DSDOL1",
"type": "bidirectional",
"description": "Channel clock input (PCM slave) or output (PCM master), or AIN1 DSD data output in DSD mode; internal 100 kΩ pull-down."
},
{
"number": "27",
"name": "TDMIN/DSDOR1",
"type": "bidirectional",
"description": "TDM data input in PCM mode or AIN2 DSD data output in DSD mode; internal 100 kΩ pull-down."
},
{
"number": "28",
"name": "SDTO1/DSDOL2",
"type": "output",
"description": "Audio serial data output for AIN1 and AIN2 in PCM mode, or AIN3 DSD output in DSD mode."
},
{
"number": "29",
"name": "SDTO2/DSDOR2",
"type": "output",
"description": "Audio serial data output for AIN3 and AIN4 in PCM mode, or AIN4 DSD output in DSD mode."
},
{
"number": "30",
"name": "OVF",
"type": "output",
"description": "Analog input overflow flag output."
},
{
"number": "31",
"name": "CKS0/SDA/CDTI",
"type": "bidirectional",
"description": "Clock mode select, I2C serial data I/O (SDA), or 3-wire control data input (CDTI)."
},
{
"number": "32",
"name": "CKS1/CAD0_I2C/CSN",
"type": "input",
"description": "Clock mode select, I2C chip address 0, or 3-wire chip select."
},
{
"number": "33",
"name": "CKS2/SCL/CCLK",
"type": "input",
"description": "Clock mode select, I2C control clock (SCL), or 3-wire control clock (CCLK)."
},
{
"number": "34",
"name": "CKS3/CAD1",
"type": "input",
"description": "Clock mode select or chip address 1 in I2C or 3-wire control mode."
},
{
"number": "35",
"name": "SLOW/DCKB",
"type": "input",
"description": "Slow roll-off digital filter select in PCM mode, or DCLK polarity in DSD mode."
},
{
"number": "36",
"name": "SD/PMOD",
"type": "input",
"description": "Short delay digital filter select in PCM mode, or DSD phase modulation mode select in DSD mode."
},
{
"number": "37",
"name": "DIF0/DSDSEL0",
"type": "input",
"description": "Audio format select in PCM mode (L: MSB justified, H: I2S), or DSD sampling rate control in DSD mode."
},
{
"number": "38",
"name": "DIF1/DSDSEL1",
"type": "input",
"description": "Audio data width select in PCM mode (L: 24-bit, H: 32-bit), or DSD sampling rate control in DSD mode."
},
{
"number": "39",
"name": "TDM0",
"type": "input",
"description": "TDM interface format select; must be fixed to L in DSD mode."
},
{
"number": "40",
"name": "TDM1",
"type": "input",
"description": "TDM interface format select; must be fixed to L in DSD mode."
},
{
"number": "41",
"name": "PSN/CAD0_SPI",
"type": "input",
"description": "Control mode select (L: I2C, H: parallel, when I2C pin=H) or chip address 0 in 3-wire mode (I2C pin=L)."
},
{
"number": "42",
"name": "I2C",
"type": "input",
"description": "Control mode select: L = 3-wire serial, H = I2C bus or parallel control."
},
{
"number": "43",
"name": "DP",
"type": "input",
"description": "DSD mode enable: L = PCM mode, H = DSD mode."
},
{
"number": "44",
"name": "HPFE/DCKS",
"type": "input",
"description": "High-pass filter enable (L: disable, H: enable), or master clock frequency select in DSD mode."
},
{
"number": "45",
"name": "LDOE",
"type": "input",
"description": "LDO enable (L: disable, H: enable); internal 100 kΩ pull-down."
},
{
"number": "46",
"name": "ODP",
"type": "input",
"description": "Optimal data placement mode enable."
},
{
"number": "47",
"name": "AIN1P",
"type": "input",
"description": "Channel 1 positive analog input."
},
{
"number": "48",
"name": "AIN1N",
"type": "input",
"description": "Channel 1 negative analog input."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad has no printed pin number; 'EP' is a placeholder. The datasheet says it must be open; VDD18 is a supply input when LDOE=L and an LDO capacitor/output pin when LDOE=H; it is typed power_i; The pin direction depends on the mode (PCM master or slave, DSD, I2C), so bidirectional is used."
],
"pages_sent": 20,
"cost_usd": 0.1946,
"at": "2026-10-30T11:56:57"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/5b607938ca0295b3cd9286ac2482cc0c.pdf",
"pages": 68,
"sha256": "273d2eeb859c2a4c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ak5534vn.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ak5534vn-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "4597e7f9dfdace33bd624d879bc5b9cde6224ca7cda689ec95ef89420854fe41",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "48-pin QFN",
"source_page": 66,
"D": {
"nom_mm": 7.0,
"range_mm": [
null,
null
]
},
"E1": {
"nom_mm": 7.0,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.85,
"range_mm": [
null,
null
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ak5534vn.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}