main
Ray Publish 0.1.0 9789096 5d ago
{
  "slug": "aip74hc540sa20-tb",
  "version": "0.1.0",
  "type": "component",
  "description": "Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, SOP-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "aip74hc540sa20.tb",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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    "path": "docs/hero.png"
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    "README.md",
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    "aip74hc540sa20-tb.kicad_mod",
    "aip74hc540sa20-tb.glb",
    "aip74hc540sa20-tb.step",
    "aip74hc540sa20-tb.lbr",
    "docs/hero.png",
    "docs/aip74hc540sa20-tb-datasheet.pdf",
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    "aip74hc540sa20-tb-hero.overlay.json",
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  ],
  "component": {
    "mpn": "AIP74HC540SA20.TB",
    "manufacturer": "Wuxi I core Elec",
    "package": "SOP-20-300mil",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Buffers, Drivers, Receivers, Transceivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590144752495722496",
    "parts": {
      "symbol": "aip74hc540sa20-tb.kicad_sym",
      "footprint": "aip74hc540sa20-tb.kicad_mod",
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      "model_3d_plain": "aip74hc540sa20-tb-etched.glb",
      "model_3d_step": "aip74hc540sa20-tb-etched.step",
      "model_3d_step_plain": "aip74hc540sa20-tb.step",
      "lbr": "aip74hc540sa20-tb.lbr"
    },
    "distributor_links": {
      "lcsc": "C3019190"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T01:02:31Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "~{OE1}",
        "type": "input",
        "description": "Active-LOW output enable input; a HIGH level forces outputs Y0 to Y7 into the high-impedance OFF-state, and the outputs are enabled only when both OE1 and OE2 are LOW."
      },
      {
        "number": "2",
        "name": "A0",
        "type": "input",
        "description": "Data input 0 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "3",
        "name": "A1",
        "type": "input",
        "description": "Data input 1 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "4",
        "name": "A2",
        "type": "input",
        "description": "Data input 2 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "5",
        "name": "A3",
        "type": "input",
        "description": "Data input 3 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "6",
        "name": "A4",
        "type": "input",
        "description": "Data input 4 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "7",
        "name": "A5",
        "type": "input",
        "description": "Data input 5 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "8",
        "name": "A6",
        "type": "input",
        "description": "Data input 6 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "9",
        "name": "A7",
        "type": "input",
        "description": "Data input 7 for the inverting buffer; for AiP74HC540 it uses CMOS input levels and for AiP74HCT540 TTL input levels, and the input has clamp diodes that allow current-limited interfacing above VCC."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground (0V) reference for all voltages on the device."
      },
      {
        "number": "11",
        "name": "Y7",
        "type": "tri_state",
        "description": "Inverting 3-state data output 7, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "12",
        "name": "Y6",
        "type": "tri_state",
        "description": "Inverting 3-state data output 6, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "13",
        "name": "Y5",
        "type": "tri_state",
        "description": "Inverting 3-state data output 5, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "14",
        "name": "Y4",
        "type": "tri_state",
        "description": "Inverting 3-state data output 4, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "15",
        "name": "Y3",
        "type": "tri_state",
        "description": "Inverting 3-state data output 3, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "16",
        "name": "Y2",
        "type": "tri_state",
        "description": "Inverting 3-state data output 2, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "17",
        "name": "Y1",
        "type": "tri_state",
        "description": "Inverting 3-state data output 1, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "18",
        "name": "Y0",
        "type": "tri_state",
        "description": "Inverting 3-state data output 0, which goes high-impedance when either output enable is HIGH and is rated for an output current of ±35 mA (absolute maximum)."
      },
      {
        "number": "19",
        "name": "~{OE2}",
        "type": "input",
        "description": "Active-LOW output enable input; a HIGH level forces outputs Y0 to Y7 into the high-impedance OFF-state, and the outputs are enabled only when both OE1 and OE2 are LOW."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage; for AiP74HC540 the recommended range is 2.0 V to 6.0 V and the absolute maximum is 7.0 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin table (p.7) lists pin numbers and names without naming the package. The pin mapping is taken; Pin descriptions for A0-A7 and Y0-Y7 are the datasheet's generic descriptions. Per-pin limits beyond; Only the HC variant applies to this MPN. The datasheet's CMOS input levels and VCC range of 2.0 V to"
        ],
        "pages_sent": 20,
        "cost_usd": 0.0696,
        "at": "2026-10-19T01:02:07"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590144752495722496",
        "pages": 20,
        "sha256": "57b6753a0e3aa53e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "checked": "2026-10-19",
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        "sha256": "2297fbd329117f70390ecd7c5e963e1de7cf56595eeed0b1c22237c0c2338aa5",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}