AIP74HC125TA14.TR

{
  "schema_version": 1,
  "type": "component",
  "slug": "aip74hc125ta14-tr",
  "title": "AIP74HC125TA14.TR",
  "brief": "Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "aip74hc125ta14.tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "AIP74HC125TA14.TR",
    "manufacturer": "Wuxi I core Elec",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Buffers, Drivers, Receivers, Transceivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590239265948413952",
    "parts": {
      "symbol": "aip74hc125ta14-tr.kicad_sym",
      "footprint": "aip74hc125ta14-tr.kicad_mod",
      "model_3d": "aip74hc125ta14-tr-hero.glb",
      "model_3d_plain": "aip74hc125ta14-tr.glb",
      "model_3d_step": "aip74hc125ta14-tr-etched.step",
      "model_3d_step_plain": "aip74hc125ta14-tr.step",
      "lbr": "aip74hc125ta14-tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C4945085"
    },
    "distributor_check": {
      "checked_at": "2026-10-09T21:02:13Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1OE",
        "type": "input",
        "description": "Active-LOW output enable input for gate 1; a HIGH level forces output 1Y into the high-impedance OFF-state."
      },
      {
        "number": "2",
        "name": "1A",
        "type": "input",
        "description": "Data input for buffer gate 1; the CMOS level input (HC version) or TTL level input (HCT version) is specified in the features list."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "tri_state",
        "description": "3-state data output for gate 1, which goes high-impedance when 1OE is HIGH."
      },
      {
        "number": "4",
        "name": "2OE",
        "type": "input",
        "description": "Active-LOW output enable input for gate 2; a HIGH level forces output 2Y into the high-impedance OFF-state."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Data input for buffer gate 2; input clamp diodes allow current-limited interfacing to voltages above VCC."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "tri_state",
        "description": "3-state data output for gate 2, which goes high-impedance when 2OE is HIGH."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground (0 V) reference for all voltages in the datasheet."
      },
      {
        "number": "8",
        "name": "3Y",
        "type": "tri_state",
        "description": "3-state data output for gate 3, which goes high-impedance when 3OE is HIGH."
      },
      {
        "number": "9",
        "name": "3A",
        "type": "input",
        "description": "Data input for buffer gate 3; input clamp diodes allow current-limited interfacing to voltages above VCC."
      },
      {
        "number": "10",
        "name": "3OE",
        "type": "input",
        "description": "Active-LOW output enable input for gate 3; a HIGH level forces output 3Y into the high-impedance OFF-state."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "tri_state",
        "description": "3-state data output for gate 4, which goes high-impedance when 4OE is HIGH."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Data input for buffer gate 4; input clamp diodes allow current-limited interfacing to voltages above VCC."
      },
      {
        "number": "13",
        "name": "4OE",
        "type": "input",
        "description": "Active-LOW output enable input for gate 4; a HIGH level forces output 4Y into the high-impedance OFF-state."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage; the recommended range for the AiP74HC125 is 2.0 V to 6.0 V (5.0 V typical) with respect to GND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: MPN given as AIP74HC125TA14.TR does not match the datasheet part number exactly. The datasheet's TSS; The datasheet's pin configuration diagram (section 2.2, page 6) is an image with no extractable text; The datasheet prints the output-enable pins as nOE with an overbar (active LOW). The overbar does no"
        ],
        "pages_sent": 17,
        "cost_usd": 0.0682,
        "at": "2026-10-09T21:01:56"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590239265948413952",
        "pages": 17,
        "sha256": "97e55e85e53263e9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "aip74hc125ta14-tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "aip74hc125ta14-tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "defac59e6acbcbee7b984a9cfdecc298ef5b37d19cda5d5535d174d6fa0209ff",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Wuxi I core Elec",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "aip74hc125ta14.tr"
  ],
  "discovery_pitch": "AIP74HC125TA14.TR (Wuxi I core Elec) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "aip74hc125ta14-tr.kicad_sym",
    "aip74hc125ta14-tr.kicad_mod",
    "aip74hc125ta14-tr.glb",
    "aip74hc125ta14-tr.step",
    "aip74hc125ta14-tr.lbr",
    "docs/hero.png",
    "docs/aip74hc125ta14-tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "aip74hc125ta14-tr-hero.glb",
    "aip74hc125ta14-tr-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}