component
AiP74HC02SA14.TR
Public Made by Adomby adom
Wuxi I core Elec Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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aip74hc02sa14-tr: factory component page (tier=lcsc)
3 files changed
+38−35
README.md+14−14@@ -8,20 +8,20 @@ AiP74HC02SA14.TR from Wuxi I core Elec AiP74HC02SA14 TR, in a SOP-14. Pinout and | Pin | Name | Type | Function | |---|---|---|---|-| 1 | 1Y | output | Gate 1 NOR output (1Y = NOT(1A OR 1B)). CMOS push-pull output. |-| 2 | 1A | input | Gate 1 data input A. CMOS-level input with clamp diode to VCC/GND. |-| 3 | 1B | input | Gate 1 data input B. CMOS-level input with clamp diode to VCC/GND. |-| 4 | 2Y | output | Gate 2 NOR output (2Y = NOT(2A OR 2B)). CMOS push-pull output. |-| 5 | 2A | input | Gate 2 data input A. CMOS-level input with clamp diode to VCC/GND. |-| 6 | 2B | input | Gate 2 data input B. CMOS-level input with clamp diode to VCC/GND. |-| 7 | GND | power_in | Ground reference (0 V). Ground current rated up to 50 mA. |-| 8 | 3A | input | Gate 3 data input A. CMOS-level input with clamp diode to VCC/GND. |-| 9 | 3B | input | Gate 3 data input B. CMOS-level input with clamp diode to VCC/GND. |-| 10 | 3Y | output | Gate 3 NOR output (3Y = NOT(3A OR 3B)). CMOS push-pull output. |-| 11 | 4A | input | Gate 4 data input A. CMOS-level input with clamp diode to VCC/GND. |-| 12 | 4B | input | Gate 4 data input B. CMOS-level input with clamp diode to VCC/GND. |-| 13 | 4Y | output | Gate 4 NOR output (4Y = NOT(4A OR 4B)). CMOS push-pull output. |-| 14 | VCC | power_in | Positive supply voltage. Operating range 2.0 V to 6.0 V; absolute max +7 V. Supply current up to 50 mA (Icc max). |+| 1 | 1Y | output | Gate 1 data output. NOR output of inputs 1A and 1B. HIGH only when both 1A and 1B are LOW. |+| 2 | 1A | input | Gate 1 data input A. CMOS logic input with clamp diodes. |+| 3 | 1B | input | Gate 1 data input B. CMOS logic input with clamp diodes. |+| 4 | 2Y | output | Gate 2 data output. NOR output of inputs 2A and 2B. HIGH only when both 2A and 2B are LOW. |+| 5 | 2A | input | Gate 2 data input A. CMOS logic input with clamp diodes. |+| 6 | 2B | input | Gate 2 data input B. CMOS logic input with clamp diodes. |+| 7 | GND | power_in | Ground (0V) reference. All voltages referenced to this pin. |+| 8 | 3A | input | Gate 3 data input A. CMOS logic input with clamp diodes. |+| 9 | 3B | input | Gate 3 data input B. CMOS logic input with clamp diodes. |+| 10 | 3Y | output | Gate 3 data output. NOR output of inputs 3A and 3B. HIGH only when both 3A and 3B are LOW. |+| 11 | 4A | input | Gate 4 data input A. CMOS logic input with clamp diodes. |+| 12 | 4B | input | Gate 4 data input B. CMOS logic input with clamp diodes. |+| 13 | 4Y | output | Gate 4 data output. NOR output of inputs 4A and 4B. HIGH only when both 4A and 4B are LOW. |+| 14 | VCC | power_in | Positive supply voltage. Operating range 2.0V to 6.0V (recommended); absolute max 7V. Bypass with 100nF to GND close to the pin. | ## Key specifications
aip74hc02sa14-tr.lbr+9−3@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>Wuxi I core Elec AiP74HC02SA14 TR Gates, SOP-14</description> <packages> <package name="SOIC-14_3.9x8.7mm_P1.27mm"> <description>SOIC-14, 3.9 x 8.7 mm, 1.27 mm pitch</description>@@ -92,6 +92,7 @@ </packages> <symbols> <symbol name="AiP74HC02SA14.TR">+ <description>Wuxi I core Elec AiP74HC02SA14 TR Gates, SOP-14</description> <wire x1="-12.7" y1="10.16" x2="12.7" y2="10.16" width="0.254" layer="94"/> <wire x1="12.7" y1="10.16" x2="12.7" y2="-10.16" width="0.254" layer="94"/> <wire x1="12.7" y1="-10.16" x2="-12.7" y2="-10.16" width="0.254" layer="94"/>@@ -116,7 +117,7 @@ </symbols> <devicesets> <deviceset name="AiP74HC02SA14.TR" prefix="U">- <description></description>+ <description>Wuxi I core Elec AiP74HC02SA14 TR Gates, SOP-14</description> <gates> <gate name="G$1" symbol="AiP74HC02SA14.TR" x="0" y="0"/> </gates>@@ -138,7 +139,12 @@ <connect gate="G$1" pin="3B" pad="9"/> <connect gate="G$1" pin="3A" pad="8"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="AiP74HC02SA14.TR" constant="no"/>+ <attribute name="MANUFACTURER" value="Wuxi I core Elec AiP74HC02SA14 TR" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+15−18@@ -32,85 +32,85 @@ "number": "1", "name": "1Y", "type": "output",- "description": "Gate 1 NOR output (1Y = NOT(1A OR 1B)). CMOS push-pull output."+ "description": "Gate 1 data output. NOR output of inputs 1A and 1B. HIGH only when both 1A and 1B are LOW." }, { "number": "2", "name": "1A", "type": "input",- "description": "Gate 1 data input A. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 1 data input A. CMOS logic input with clamp diodes." }, { "number": "3", "name": "1B", "type": "input",- "description": "Gate 1 data input B. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 1 data input B. CMOS logic input with clamp diodes." }, { "number": "4", "name": "2Y", "type": "output",- "description": "Gate 2 NOR output (2Y = NOT(2A OR 2B)). CMOS push-pull output."+ "description": "Gate 2 data output. NOR output of inputs 2A and 2B. HIGH only when both 2A and 2B are LOW." }, { "number": "5", "name": "2A", "type": "input",- "description": "Gate 2 data input A. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 2 data input A. CMOS logic input with clamp diodes." }, { "number": "6", "name": "2B", "type": "input",- "description": "Gate 2 data input B. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 2 data input B. CMOS logic input with clamp diodes." }, { "number": "7", "name": "GND", "type": "power_in",- "description": "Ground reference (0 V). Ground current rated up to 50 mA."+ "description": "Ground (0V) reference. All voltages referenced to this pin." }, { "number": "8", "name": "3A", "type": "input",- "description": "Gate 3 data input A. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 3 data input A. CMOS logic input with clamp diodes." }, { "number": "9", "name": "3B", "type": "input",- "description": "Gate 3 data input B. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 3 data input B. CMOS logic input with clamp diodes." }, { "number": "10", "name": "3Y", "type": "output",- "description": "Gate 3 NOR output (3Y = NOT(3A OR 3B)). CMOS push-pull output."+ "description": "Gate 3 data output. NOR output of inputs 3A and 3B. HIGH only when both 3A and 3B are LOW." }, { "number": "11", "name": "4A", "type": "input",- "description": "Gate 4 data input A. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 4 data input A. CMOS logic input with clamp diodes." }, { "number": "12", "name": "4B", "type": "input",- "description": "Gate 4 data input B. CMOS-level input with clamp diode to VCC/GND."+ "description": "Gate 4 data input B. CMOS logic input with clamp diodes." }, { "number": "13", "name": "4Y", "type": "output",- "description": "Gate 4 NOR output (4Y = NOT(4A OR 4B)). CMOS push-pull output."+ "description": "Gate 4 data output. NOR output of inputs 4A and 4B. HIGH only when both 4A and 4B are LOW." }, { "number": "14", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage. Operating range 2.0 V to 6.0 V; absolute max +7 V. Supply current up to 50 mA (Icc max)."+ "description": "Positive supply voltage. Operating range 2.0V to 6.0V (recommended); absolute max 7V. Bypass with 100nF to GND close to the pin." } ], "provenance": {@@ -174,8 +174,5 @@ "docs/aip74hc02sa14-tr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": {- "public": true- }+ ] }