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Initial commit: component/aip74hc02sa14-tr

Ray ·0897ba3361 ·2mo ago
2 files changed +91
README.mdadded+57
@@ -0,0 +1,57 @@+# AiP74HC02SA14.TR++**Wuxi I core Elec AiP74HC02SA14 TR** · Gates · SOP-14++AiP74HC02SA14.TR from Wuxi I core Elec AiP74HC02SA14 TR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1Y | output | Gate 1 NOR output (1Y = NOT(1A OR 1B)). CMOS push-pull output. |+| 2 | 1A | input | Gate 1 data input A. CMOS-level input with clamp diode to VCC/GND. |+| 3 | 1B | input | Gate 1 data input B. CMOS-level input with clamp diode to VCC/GND. |+| 4 | 2Y | output | Gate 2 NOR output (2Y = NOT(2A OR 2B)). CMOS push-pull output. |+| 5 | 2A | input | Gate 2 data input A. CMOS-level input with clamp diode to VCC/GND. |+| 6 | 2B | input | Gate 2 data input B. CMOS-level input with clamp diode to VCC/GND. |+| 7 | GND | power_in | Ground reference (0 V). Ground current rated up to 50 mA. |+| 8 | 3A | input | Gate 3 data input A. CMOS-level input with clamp diode to VCC/GND. |+| 9 | 3B | input | Gate 3 data input B. CMOS-level input with clamp diode to VCC/GND. |+| 10 | 3Y | output | Gate 3 NOR output (3Y = NOT(3A OR 3B)). CMOS push-pull output. |+| 11 | 4A | input | Gate 4 data input A. CMOS-level input with clamp diode to VCC/GND. |+| 12 | 4B | input | Gate 4 data input B. CMOS-level input with clamp diode to VCC/GND. |+| 13 | 4Y | output | Gate 4 NOR output (4Y = NOT(4A OR 4B)). CMOS push-pull output. |+| 14 | VCC | power_in | Positive supply voltage. Operating range 2.0 V to 6.0 V; absolute max +7 V. Supply current up to 50 mA (Icc max). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Wuxi I core Elec AiP74HC02SA14 TR |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `AiP74HC02SA14.TRSA14.TR`+- `AiP74HC02SA14.TRSA14.TB`+- `AiP74HC02SA14.TRDA14.TB`+- `AiP74HC02SA14.TRTA14.TR`+- `AiP74HC02SA14.TRTA14.TB`++## CAD (KiCad official)++- Symbol: `AiP74HC02SA14.TR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Wuxi I core Elec AiP74HC02SA14 TR datasheet](docs/aip74hc02sa14-tr-datasheet.pdf) (17 pp, sha256 `b8c4af095b3d023a`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/aip74hc02sa14-tr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "aip74hc02sa14-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "Wuxi I core Elec AiP74HC02SA14 TR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "aip74hc02sa14.tr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "aip74hc02sa14-tr.kicad_sym",+    "aip74hc02sa14-tr.kicad_mod",+    "aip74hc02sa14-tr.glb",+    "aip74hc02sa14-tr.step",+    "aip74hc02sa14-tr.lbr",+    "docs/hero.png",+    "docs/aip74hc02sa14-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file