component
AiP1302SA8.TR
Public Made by Adomby adom
Wuxi I core Elec Real-time Clocks (RTC), SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
aip1302sa8-tr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
0581619
1mo ago
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{
"schema_version": 1,
"type": "component",
"slug": "aip1302sa8-tr",
"title": "AiP1302SA8.TR",
"brief": "Wuxi I core Elec Real-time Clocks (RTC), SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"rtc",
"aip1302sa8.tr"
],
"component": {
"mpn": "AiP1302SA8.TR",
"manufacturer": "Wuxi I core Elec",
"package": "SOP-8",
"pin_count": 8,
"category": "RTC",
"subcategory": "Real-time Clocks (RTC)",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2210091830_Wuxi-I-core-Elec-AiP1302SA8-TR_C5183394.pdf",
"parts": {
"symbol": "aip1302sa8-tr.kicad_sym",
"footprint": "aip1302sa8-tr.kicad_mod",
"model_3d": "aip1302sa8-tr-etched.glb",
"model_3d_plain": "aip1302sa8-tr.glb",
"model_3d_step": "aip1302sa8-tr-etched.step",
"model_3d_step_plain": "aip1302sa8-tr.step",
"lbr": "aip1302sa8-tr.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "VCC2",
"type": "power_in",
"description": "Main power supply input, 2.0 V to 5.5 V. Powers the device when VCC2 > VCC1 + 0.2 V; also sources trickle-charge current to VCC1 when enabled."
},
{
"number": "2",
"name": "X1",
"type": "passive",
"description": "32.768 kHz crystal connection. Connect to one terminal of an external 32.768 kHz tuning-fork crystal (typical CL = 12.5 pF, ESR ≤ 45 kΩ)."
},
{
"number": "3",
"name": "X2",
"type": "passive",
"description": "32.768 kHz crystal connection. Connect to the other terminal of the external 32.768 kHz tuning-fork crystal (typical CL = 12.5 pF, ESR ≤ 45 kΩ)."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground / device 0 V reference."
},
{
"number": "5",
"name": "CE",
"type": "input",
"description": "Chip enable (chip-select) input for the 3-wire serial interface. Drive high to load address/command into the shift register and start a transfer; drive low to end the transfer and place I/O in high impedance. On power-up CE must be held low until VCC > 2.5 V, and CE may only be driven high while SCLK is low."
},
{
"number": "6",
"name": "I/O",
"type": "bidirectional",
"description": "Bidirectional serial data pin for the 3-wire interface. Command/address and write data are shifted in on SCLK rising edges (LSB first); read data is shifted out on SCLK falling edges. High impedance while CE is low."
},
{
"number": "7",
"name": "SCLK",
"type": "input",
"description": "Serial clock input for the 3-wire interface. Maximum clock frequency 0.5 MHz at VCC=2.0 V and 2.0 MHz at VCC=5.0 V."
},
{
"number": "8",
"name": "VCC1",
"type": "power_in",
"description": "Backup power supply input (battery or ≥0.1 F supercapacitor). Supplies the RTC when VCC2 < VCC1 + 0.2 V. Can be trickle-charged from VCC2 through internal resistor/diode network (R1=2 kΩ, R2=4 kΩ, R3=8 kΩ, VTD≈0.7 V)."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2210091830_Wuxi-I-core-Elec-AiP1302SA8-TR_C5183394.pdf",
"pages": 17,
"sha256": "5d7048ca9dc07e97",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "aip1302sa8-tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "aip1302sa8-tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "95b724193e3282a711bbed3cfad9673cb6e762959b6b8e358ae1e3cd947d97e6",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Wuxi I core Elec",
"Package": "SOP-8",
"Category": "RTC",
"Pins": "8"
}
},
"variants": [
{
"mpn": "AiP1302SA8.TR",
"kind": "packaging"
},
{
"mpn": "AiP1302SA8.TB",
"kind": "unknown"
},
{
"mpn": "AiP1302SA8.TRDA8.TB",
"kind": "packaging"
},
{
"mpn": "AiP1302SA8.TRTB8.TR",
"kind": "packaging"
},
{
"mpn": "AiP1302SA8.TRTB8.TB",
"kind": "packaging"
},
{
"mpn": "AiP1302SA8.TRXF8.TR",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"aip1302sa8.tr"
],
"discovery_pitch": "AiP1302SA8.TR (Wuxi I core Elec) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"aip1302sa8-tr.kicad_sym",
"aip1302sa8-tr.kicad_mod",
"aip1302sa8-tr.glb",
"aip1302sa8-tr.step",
"aip1302sa8-tr.lbr",
"docs/hero.png",
"docs/aip1302sa8-tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T16:11:03.834Z"
}