component
AiP1302SA8.TR
Public Made by Adomby adom
Wuxi I core Elec Real-time Clocks (RTC), SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAiP1302SA8.TR
Wuxi I core Elec · Real-time Clocks (RTC) · SOP-8
AiP1302SA8.TR from Wuxi I core Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC2 | power_in | Main power supply input, 2.0 V to 5.5 V. Powers the device when VCC2 > VCC1 + 0.2 V; also sources trickle-charge current to VCC1 when enabled. |
| 2 | X1 | passive | 32.768 kHz crystal connection. Connect to one terminal of an external 32.768 kHz tuning-fork crystal (typical CL = 12.5 pF, ESR ≤ 45 kΩ). |
| 3 | X2 | passive | 32.768 kHz crystal connection. Connect to the other terminal of the external 32.768 kHz tuning-fork crystal (typical CL = 12.5 pF, ESR ≤ 45 kΩ). |
| 4 | GND | power_in | Ground / device 0 V reference. |
| 5 | CE | input | Chip enable (chip-select) input for the 3-wire serial interface. Drive high to load address/command into the shift register and start a transfer; drive low to end the transfer and place I/O in high impedance. On power-up CE must be held low until VCC > 2.5 V, and CE may only be driven high while SCLK is low. |
| 6 | I/O | bidirectional | Bidirectional serial data pin for the 3-wire interface. Command/address and write data are shifted in on SCLK rising edges (LSB first); read data is shifted out on SCLK falling edges. High impedance while CE is low. |
| 7 | SCLK | input | Serial clock input for the 3-wire interface. Maximum clock frequency 0.5 MHz at VCC=2.0 V and 2.0 MHz at VCC=5.0 V. |
| 8 | VCC1 | power_in | Backup power supply input (battery or ≥0.1 F supercapacitor). Supplies the RTC when VCC2 < VCC1 + 0.2 V. Can be trickle-charged from VCC2 through internal resistor/diode network (R1=2 kΩ, R2=4 kΩ, R3=8 kΩ, VTD≈0.7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | SOP-8 |
| Category | RTC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
AiP1302SA8.TRAiP1302SA8.TBAiP1302SA8.TRDA8.TBAiP1302SA8.TRTB8.TRAiP1302SA8.TRTB8.TBAiP1302SA8.TRXF8.TR
CAD (KiCad official)
- Symbol:
AiP1302SA8.TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
aip1302sa8-tr-etched.step/aip1302sa8-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip1302sa8-tr.step/aip1302sa8-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (17 pp, sha256
5d7048ca9dc07e97, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).