# AFE4490RHAT

**Texas Instruments** · Analog Front End (AFEs) · VQFN-40-EP(6x6)

AFE4490RHAT from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INN | input | Receiver input pin that connects to the photodiode anode. |
| 2 | INP | input | Receiver input pin that connects to the photodiode cathode. |
| 3 | RX_ANA_GND | power_in | Rx analog ground pin that connects to common board ground. |
| 4 | VCM | passive | Input common-mode voltage output, expected at 0.9 V, with a 1 kΩ series resistor and 10 nF decoupling capacitor to ground. |
| 5 | DNC | unconnected | Do not connect; leave as open circuit. |
| 6 | DNC | unconnected | Do not connect; leave as open circuit. |
| 7 | BG | passive | Decoupling capacitor for the internal band-gap voltage, requiring a 2.2 µF capacitor to ground with an expected voltage of 1.0 V. |
| 8 | VSS | power_in | Substrate ground pin that connects to common board ground. |
| 9 | TX_REF | passive | Transmitter reference voltage, 0.75 V by default after reset, requiring a 2.2 µF decoupling capacitor to ground. |
| 10 | DNC | unconnected | Do not connect; leave as open circuit. |
| 11 | TX_CTRL_SUP | power_in | Transmit control supply pin that requires a 0.1 µF decoupling capacitor to ground. |
| 12 | LED_DRV_GND | power_in | LED driver ground pin for the H-bridge that connects to common board ground. |
| 13 | LED_DRV_GND | power_in | LED driver ground pin for the H-bridge that connects to common board ground. |
| 14 | TXN | output | LED driver H-bridge output B that connects to the LED. |
| 15 | TXP | output | LED driver H-bridge output B that connects to the LED. |
| 16 | LED_DRV_GND | power_in | LED driver ground pin for the H-bridge that connects to common board ground. |
| 17 | LED_DRV_SUP | power_in | LED driver supply pin for the H-bridge that must be fed by a supply capable of delivering the large LED current. |
| 18 | LED_DRV_SUP | power_in | LED driver supply pin for the H-bridge that must be fed by a supply capable of delivering the large LED current. |
| 19 | RX_DIG_GND | power_in | Rx digital ground pin that connects to common board ground. |
| 20 | AFE_PDN | input | AFE-only power-down input that is active low. |
| 21 | DIAG_END | output | Output signal that indicates completion of diagnostics and can connect to a microcontroller port pin. |
| 22 | LED_ALM | output | Output signal that indicates an LED cable fault and can connect to a microcontroller port pin. |
| 23 | PD_ALM/ADC Reset | output | Output signal that indicates a photodiode sensor or cable fault, and in ADC bypass mode carries the ADC reset signal. |
| 24 | SCLK | input | SPI clock pin. |
| 25 | SPISOMI | output | SPI serial out, master in pin. |
| 26 | SPISIMO | input | SPI serial in, master out pin. |
| 27 | SPISTE | input | SPI serial interface enable pin. |
| 28 | ADC_RDY | output | Output signal that indicates ADC conversion completion and can connect to a microcontroller interrupt input. |
| 29 | RESET | input | AFE-only reset input that is active low. |
| 30 | CLKOUT | output | Buffered 4-MHz clock output that can connect to a microcontroller clock input. |
| 31 | RX_DIG_SUP | power_in | Rx digital supply pin that requires a 0.1 µF decoupling capacitor to ground. |
| 32 | RX_DIG_GND | power_in | Rx digital ground pin that connects to common board ground. |
| 33 | RX_ANA_SUP | power_in | Rx analog supply pin that requires a 0.1 µF decoupling capacitor to ground. |
| 34 | RXOUTN | input | External ADC negative input used in ADC bypass mode. |
| 35 | RXOUTP | input | External ADC positive input used in ADC bypass mode. |
| 36 | RX_ANA_GND | power_in | Rx analog ground pin that connects to common board ground. |
| 37 | XOUT | passive | Crystal oscillator pin; connect an external 8 MHz crystal between XIN and XOUT with the vendor-specified load capacitors to ground. |
| 38 | XIN | passive | Crystal oscillator pin; connect an external 8 MHz crystal between XIN and XOUT with the vendor-specified load capacitors to ground. |
| 39 | RX_ANA_SUP | power_in | Rx analog supply pin that requires a 0.1 µF decoupling capacitor to ground. |
| 40 | RX_ANA_GND | power_in | Rx analog ground pin that connects to common board ground. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | ADC/DAC/Data Conversion |
| Pins | 41 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RX_ANA_SUP, RX_DIG_SUP to RX_ANA_GND, RX_DIG_GND |  | -0.3 |  | 4 | V |  | 8 |
| TX_CTRL_SUP, LED_DRV_SUP to LED_DRV_GND |  | -0.3 |  | 6 | V |  | 8 |
| RX_ANA_GND, RX_DIG_GND to LED_DRV_GND |  | -0.3 |  | 0.3 | V |  | 8 |
| TXP, TXN pins voltage |  | -0.3 |  |  | V | Maximum is the minimum of 6 V and (LED_DRV_SUP + 0.3) V | 8 |
| Input current to any pin except supply pins |  | -7 |  | 7 | mA |  | 8 |
| Input current momentary |  | -50 |  | 50 | mA | Momentary | 8 |
| Input current continuous |  | -7 |  | 7 | mA | Continuous | 8 |
| Operating temperature range |  | -40 |  | 85 | °C |  | 8 |
| Maximum junction temperature | TJ |  |  | 125 | °C |  | 8 |
| Storage temperature range | Tstg | -60 |  | 150 | °C |  | 8 |
| Electrostatic discharge, human body model | V(ESD) | -1000 |  | 1000 | V | HBM, per ANSI/ESDA/JEDEC JS-001, all pins | 8 |
| Electrostatic discharge, charged device model | V(ESD) | -250 |  | 250 | V | CDM, per JEDEC JESD22-C101, all pins | 8 |
| RX_ANA_SUP AFE analog supply | RX_ANA_SUP | 2 |  | 3.6 | V |  | 9 |
| RX_DIG_SUP AFE digital supply | RX_DIG_SUP | 2 |  | 3.6 | V |  | 9 |
| TX_CTRL_SUP Transmit controller supply | TX_CTRL_SUP | 3 |  | 5.25 | V |  | 9 |
| LED_DRV_SUP Transmit LED driver supply | LED_DRV_SUP | 3 |  | 5.25 | V | H-bridge or common anode; minimum is 3.0 or (VHR + VLED + VCABLE), whichever is greater | 9 |
| Difference between LED_DRV_SUP and TX_CTRL_SUP |  | -0.3 |  | 0.3 | V |  | 9 |
| Specified temperature range |  | -40 |  | 85 | °C |  | 9 |
| Junction-to-ambient thermal resistance RθJA | RθJA |  | 35 |  | °C/W | RHA (VQFN) 40 pins | 9 |
| Junction-to-case (top) thermal resistance RθJC(top) | RθJC(top) |  | 31 |  | °C/W | RHA (VQFN) 40 pins | 9 |
| Junction-to-board thermal resistance RθJB | RθJB |  | 26 |  | °C/W | RHA (VQFN) 40 pins | 9 |
| Junction-to-top characterization parameter ψJT | ψJT |  | 0.1 |  | °C/W | RHA (VQFN) 40 pins | 9 |
| Gain accuracy |  | -7 |  | 7 | % | I-V transimpedance amplifier gain | 11 |
| Feedback resistor tolerance | RF | -7 |  | 7 | % |  | 11 |
| Feedback capacitor tolerance | CF | -20 |  | 20 | % |  | 11 |
| External differential input capacitance |  | 10 |  | 1000 | pF | Includes equivalent capacitance of photodiode, cables, EMI filter, and so forth | 11 |
| Shield output voltage | VO(shield) | 0.8 | 0.9 | 1 | V | With a 1-kΩ series resistor and a 10-nF decoupling capacitor to ground, when loaded with a small current (for example, of a few µA or less) | 11 |
| Current DAC range |  | 0 |  | 10 | µA | Ambient cancellation stage | 11 |
| Current DAC step size |  |  | 1 |  | µA | Ambient cancellation stage | 11 |
| ADC full-scale voltage |  | -1.2 |  | 1.2 | V | ADC full-scale voltage ±1.2 V | 11 |
| Pulse repetition frequency | PRF | 62.5 |  | 5000 | SPS |  | 10 |
| Common-mode rejection ratio, LED1 and LED2 | CMRR | 75 |  |  | dB | fCM = 50 Hz and 60 Hz, LED1 and LED2 with RSERIES = 500 kΩ, RF = 500 kΩ | 10 |
| Common-mode rejection ratio, LED1-AMB and LED2-AMB | CMRR | 95 |  |  | dB | fCM = 50 Hz and 60 Hz, LED1-AMB and LED2-AMB with RSERIES = 500 kΩ, RF = 500 kΩ | 10 |
| Power-supply rejection ratio | PSRR | 100 |  |  | dB | fPS = 50 Hz, 60 Hz at PRF = 200 Hz | 10 |
| Power-supply rejection ratio | PSRR | 106 |  |  | dB | fCM = 50 Hz, 60 Hz at PRF = 600 Hz | 10 |
| PSRR, transmit LED driver | PSRRLED | 75 |  |  | dB | With respect to ripple on LED_DRV_SUP | 10 |
| PSRR, transmit control | PSRRTx | 60 |  |  | dB | With respect to ripple on TX_CTRL_SUP | 10 |
| PSRR, receiver | PSRRRx | 60 |  |  | dB | With respect to ripple on RX_ANA_SUP and RX_DIG_SUP | 10 |
| Transmitter noise dynamic range at 25 mA |  | 110 |  |  | dB | 0.1-Hz to 20-Hz bandwidth, at 25-mA output current | 11 |
| Transmitter noise dynamic range at 100 mA |  | 110 |  |  | dB | 0.1-Hz to 20-Hz bandwidth, at 100-mA output current | 11 |
| Minimum sample time of LED1 and LED2 pulses |  | 50 |  |  | µs |  | 11 |
| LED current DAC error |  | -5 |  | 5 | % |  | 11 |
| LED current DAC leakage current |  |  |  | 1 | µA | LED_ON = 0 | 11 |
| LED current DAC leakage current |  |  |  | 50 | µA | LED_ON = 1 | 11 |
| LED current DAC linearity |  |  |  | 0.5 | % | Percent of full-scale current | 11 |
| Output current settling time |  |  |  | 7 | µs | From zero current to 150 mA (with resistive load) | 11 |
| Duration of diagnostics state machine, slow diagnostics off |  |  |  | 8 | ms | EN_SLOW_DIAG = 0; start of diagnostics after the DIAG_EN register bit is set, end indicated by DIAG_END going high | 12 |
| Duration of diagnostics state machine, slow diagnostics on |  |  |  | 16 | ms | EN_SLOW_DIAG = 1; start of diagnostics after the DIAG_EN register bit is set, end indicated by DIAG_END going high | 12 |
| Open fault resistance |  | 100 |  |  | kΩ | Diagnostics open fault detection threshold | 12 |
| Short fault resistance |  |  |  | 10 | kΩ | Diagnostics short fault detection threshold | 12 |
| Diagnostics current |  |  |  | 100 | µA | During diagnostics mode | 12 |
| Maximum allowable external clock jitter |  |  |  | 50 | ps |  | 12 |
| External clock input frequency tolerance |  | -10 |  | 10 | % | External clock input frequency 8 MHz | 12 |
| External clock input current |  |  |  | 1 | µA |  | 12 |
| Logic input current | IIN |  |  | 0.1 | µA | Digital inputs at VIH or VIL | 12 |
| Logic low output voltage | VOL |  |  | 0.1 | V | DIAG_END, LED_ALM, PD_ALM, SPI SOMI, ADC_RDY, CLKOUT | 12 |
| Pin leakage current |  |  |  | 1 | nA | To GND and supply | 12 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pet |  | counter (running off of the 4-MHz clock) to set the time-base. All timing signals are set with reference to the pulse repetition period (PRP). Therefore, a dedicated compare | 33 |

## CAD (KiCad official)

- Symbol: `AFE4490RHAT`
- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`
- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files: `afe4490rhat-etched.step` / `afe4490rhat-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `afe4490rhat.step` / `afe4490rhat.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/afe4490rhat.pdf) (102 pp, sha256 `24df2fc56cacfa70`, retrieved 2026-11-02, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/afe4490rhat-datasheet.pdf)