component
ADUM5010ARSZ
Public Made by Adomby adom
Analog Devices DC-DC Converters, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ADUM5010ARSZ
Analog Devices · DC-DC Converters · SSOP-20-208mil
ADUM5010ARSZ from Analog Devices, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | This pin is not connected internally and is not used. |
| 2 | GNDP | power_in | Ground 1 is the ground reference for the isolator primary; Pin 2 and Pin 10 are internally connected, and all GNDP pins should be connected to a common ground. |
| 3 | NC | unconnected | This pin is not connected internally and is not used. |
| 4 | NC | unconnected | This pin is not connected internally and is not used. |
| 5 | GNDP | power_in | Ground 1 is the ground reference for the isolator primary; this pin should be connected to the common ground. |
| 6 | GNDP | power_in | Ground 1 is the ground reference for the isolator primary; this pin should be connected to the common ground. |
| 7 | NC | unconnected | This pin is not connected internally and is not used. |
| 8 | PDIS | input | Power Disable: tying this pin to GNDP enables the power converter, while a logic high voltage puts the power supply into low-power standby mode. |
| 9 | VDDP | power_in | Primary supply voltage input, specified at 3.0 V to 5.5 V. |
| 10 | GNDP | power_in | Ground 1 is the ground reference for the isolator primary; Pin 10 and Pin 2 are internally connected, and all GNDP pins should be connected to a common ground. |
| 11 | GNDISO | power_in | Ground reference for isolator side 2; Pin 11 and Pin 19 are internally connected, and all GNDISO pins should be connected to a common ground. |
| 12 | VISO | power_out | Secondary supply voltage output for external loads, 3.15 V to 5.5 V depending on the voltage divider connected to VSEL. |
| 13 | VSEL | input | Output voltage select input: a voltage divider between VISO and GNDISO sets VISO per Equation 1, with input voltage limited to -0.5 V to VDD + 0.5 V per the absolute maximum ratings. |
| 14 | NC | unconnected | This pin is not connected internally and is not used. |
| 15 | GNDISO | power_in | Ground reference for isolator side 2; this pin should be connected to the common ground. |
| 16 | GNDISO | power_in | Ground reference for isolator side 2; this pin should be connected to the common ground. |
| 17 | NC | unconnected | This pin is not connected internally and is not used. |
| 18 | NC | unconnected | This pin is not connected internally and is not used. |
| 19 | GNDISO | power_in | Ground reference for isolator side 2; Pin 19 and Pin 11 are internally connected, and all GNDISO pins should be connected to a common ground. |
| 20 | NC | unconnected | This pin is not connected internally and is not used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SSOP-20-208mil |
| Category | Power Supply Chip |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | TA | -40 | 105 | °C | 7 | ||
| Supply Voltage VDD1 at VSEL = 0 V | VDD | 3 | 5.5 | V | VSEL = 0 V | 7 | |
| Supply Voltage VDD1 at VSEL = VISO | VDD | 4.5 | 5.5 | V | VSEL = VISO | 7 | |
| Storage Temperature | TST | -55 | 150 | °C | 9 | ||
| Ambient Operating Temperature | TA | -40 | 105 | °C | 9 | ||
| Supply Voltages (VDDP, VISO) | VDDP, VISO | -0.5 | 7 | V | 9 | ||
| VISO Supply Current | 30 | mA | TA = −40°C to +105°C | 9 | |||
| Input Voltage (PDIS, VSEL) | -0.5 | V | Upper limit printed as VDD + 0.5 V (VDD = VDDP or VISO) | 9 | |||
| Common-Mode Transients | -100 | 100 | kV/µs | 9 | |||
| Load Regulation [5 V primary / 5 V secondary] | VISO (LOAD) | 1.3 | 3 | % | IISO = 3 mA to 27 mA | 3 | |
| IDDP, No VISO Load [5 V primary / 5 V secondary] | IDD1 (Q) | 6.8 | 12 | mA | 3 | ||
| Output Supply [5 V primary / 5 V secondary] | IISO (MAX) | 30 | mA | VISO > 4.5 V | 3 | ||
| IDDP, Full VISO Load [5 V primary / 5 V secondary] | IDD1 (MAX) | 104 | mA | 3 | |||
| Input Currents per Channel [5 V primary / 5 V secondary] | IPDIS | -10 | 0.01 | 10 | µA | 0 V ≤ VPDIS ≤ VDDP | 3 |
| Load Regulation [3.3 V primary / 3.3 V secondary] | VISO (LOAD) | 1.3 | 3 | % | IISO = 2 mA to 18 mA | 4 | |
| IDD1, No VISO Load [3.3 V primary / 3.3 V secondary] | IDD1 (Q) | 3.3 | 10.5 | mA | 4 | ||
| Output Supply [3.3 V primary / 3.3 V secondary] | IISO (MAX) | 20 | mA | 3.6 V > VISO > 3 V | 4 | ||
| IDD1, Full VISO Load [3.3 V primary / 3.3 V secondary] | IDD1 (MAX) | 77 | mA | 4 | |||
| Input Currents per Channel [3.3 V primary / 3.3 V secondary] | IPDIS | -10 | 0.01 | 10 | µA | 0 V ≤ VPDIS ≤ VDDP | 4 |
| Load Regulation [5 V primary / 3.3 V secondary] | VISO (LOAD) | 1.3 | 3 | % | IISO = 3 mA to 27 mA | 5 | |
| IDD1, No VISO Load [5 V primary / 3.3 V secondary] | IDD1 (Q) | 3.2 | 8 | mA | 5 | ||
| Output Supply [5 V primary / 3.3 V secondary] | IISO (MAX) | 30 | mA | 3.6 V > VISO > 3 V | 5 | ||
| IDD1, Full VISO Load [5 V primary / 3.3 V secondary] | IDD1 (MAX) | 85 | mA | 5 | |||
| Input Currents per Channel [5 V primary / 3.3 V secondary] | IPDIS | -10 | 0.01 | 10 | µA | 0 V ≤ VPDIS ≤ VDDP | 5 |
| IC Junction-to-Ambient Thermal Resistance | θJA | 50 | °C/W | Thermocouple at center of package underside; 4-layer board with thin traces | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), ADuM5010 is proof tested by applying an insulation test voltage ≥1125 V peak for 1 second (partial discharge detection limit = 5 pC). The * markin | 6 |
CAD (KiCad official)
- Symbol:
ADUM5010ARSZ - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
adum5010arsz-etched.step/adum5010arsz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum5010arsz.step/adum5010arsz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (15 pp, sha256
9998f1a895087c9b, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).