component
ADUM4221ARIZ-RL
Public Made by Adomby adom
Analog Devices Gate Drive ICs, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"pins": [
{
"number": "1",
"name": "VIA",
"type": "input",
"description": "Logic Input A; the input supply range is 2.5 V to 6.5 V and VIA is rated -0.3 V to +7 V (up to 6.5 V when VDD1 is unpowered)."
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{
"number": "2",
"name": "VIB",
"type": "input",
"description": "Logic Input B; the input supply range is 2.5 V to 6.5 V and VIB is rated -0.3 V to +7 V (up to 6.5 V when VDD1 is unpowered)."
},
{
"number": "3",
"name": "VDD1",
"type": "power_in",
"description": "Input supply voltage, referenced to GND1, with a recommended range of 2.5 V to 6.5 V; pin 3 is internally connected to pin 8 and both should be tied to the input supply."
},
{
"number": "4",
"name": "GND1",
"type": "power_in",
"description": "Ground reference for the input logic signals and the low-side reference for VDD1, DISABLE, DT and the VIA/VIB inputs."
},
{
"number": "5",
"name": "DISABLE",
"type": "input",
"description": "Input disable; a logic high disables the isolator inputs and refresh circuits, forcing VOA and VOB low."
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{
"number": "6",
"name": "DT",
"type": "input",
"description": "Dead time control input; a resistor from DT to GND1 sets the dead time between output transitions, with the resistor range 10 kΩ to 500 kΩ."
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{
"number": "7",
"name": "NC",
"type": "unconnected",
"description": "No connect; do not connect to this pin."
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{
"number": "8",
"name": "VDD1",
"type": "power_in",
"description": "Input supply voltage, referenced to GND1, with a recommended range of 2.5 V to 6.5 V; internally connected to pin 3 and recommended to be tied to the same input supply."
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{
"number": "9",
"name": "GNDB",
"type": "power_in",
"description": "Ground reference for output B, the reference for VOB and the VDDB supply."
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{
"number": "10",
"name": "VOB",
"type": "output",
"description": "Output B, the gate drive output for the low-side channel, referenced to GNDB and driven from VDDB; the output defaults low."
},
{
"number": "11",
"name": "VDDB",
"type": "power_in",
"description": "Output B supply voltage, referenced to GNDB, with a recommended range of 4.5 V to 35 V."
},
{
"number": "12",
"name": "NC",
"type": "unconnected",
"description": "No connect; do not connect to this pin."
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{
"number": "13",
"name": "NC",
"type": "unconnected",
"description": "No connect; do not connect to this pin."
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{
"number": "14",
"name": "GNDA",
"type": "power_in",
"description": "Ground reference for output A, the reference for VOA and the VDDA supply."
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{
"number": "15",
"name": "VOA",
"type": "output",
"description": "Output A, the gate drive output for the high-side channel, referenced to GNDA and driven from VDDA; the output defaults low."
},
{
"number": "16",
"name": "VDDA",
"type": "power_in",
"description": "Output A supply voltage, referenced to GNDA, with a recommended range of 4.5 V to 35 V."
}
],
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"at": "2026-11-05T22:28:01"
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"appearance": {
"housing": {
"quote": "In accordance with DIN VDE V 0884-11, each ADuM4221 is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on ",
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"name": "Output Supply Current, Per Channel, Quiescent, Output Low",
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"name": "Input Threshold Logic High",
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"conditions": "VDD1 > 5 V",
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{
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{
"name": "VDD1 Negative Going UVLO Threshold",
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{
"name": "VDDA and VDDB Positive Going UVLO Threshold, Grade A",
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{
"name": "VDDA and VDDB Negative Going UVLO Threshold, Grade A",
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{
"name": "Pull-Down NMOS On Resistance",
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{
"name": "Pull-Up PMOS On Resistance",
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"kind": "electrical",
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"min": null,
"typ": 0.8,
"max": 1.8,
"conditions": "Tested at 250 mA, VDDx = 15 V",
"source_page": 3,
"source": "datasheet"
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{
"name": "Peak Current",
"symbol": "IPEAK",
"kind": "electrical",
"unit": "A",
"min": 4,
"typ": null,
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"conditions": "VDDA,VDDB = 15 V, 2 Ω gate resistance",
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{
"name": "Pulse Width",
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{
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{
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{
"name": "Time to Disable",
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"kind": "timing",
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"conditions": "CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, and RG = 5.1 Ω",
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{
"name": "Time to Enable",
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"conditions": "CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, and RG = 5.1 Ω",
"source_page": 4,
"source": "datasheet"
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{
"name": "Delay Skew",
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"kind": "timing",
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"min": null,
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"conditions": "CL = 2.2 nF, RG = 5.1 Ω",
"source_page": 4,
"source": "datasheet"
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{
"name": "Pulse Width Distortion",
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{
"name": "Channel to Channel Matching",
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"conditions": "CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, see Figure 19",
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{
"name": "Output Rise and Fall Time (10% to 90%)",
"symbol": "tR/tF",
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"min": 14,
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"conditions": "CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω, see Figure 26",
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},
{
"name": "Adjustable Dead Time",
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"conditions": "RDT = 500 kΩ; CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω",
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{
"name": "Adjustable Dead Time",
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{
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{
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{
"name": "Dynamic Common-Mode Transient Immunity",
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