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ADUM4221ARIZ-RL

Analog Devices · Gate Drive ICs · SOIC-16-300mil

ADUM4221ARIZ-RL from Analog Devices, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIA input Logic Input A; the input supply range is 2.5 V to 6.5 V and VIA is rated -0.3 V to +7 V (up to 6.5 V when VDD1 is unpowered).
2 VIB input Logic Input B; the input supply range is 2.5 V to 6.5 V and VIB is rated -0.3 V to +7 V (up to 6.5 V when VDD1 is unpowered).
3 VDD1 power_in Input supply voltage, referenced to GND1, with a recommended range of 2.5 V to 6.5 V; pin 3 is internally connected to pin 8 and both should be tied to the input supply.
4 GND1 power_in Ground reference for the input logic signals and the low-side reference for VDD1, DISABLE, DT and the VIA/VIB inputs.
5 DISABLE input Input disable; a logic high disables the isolator inputs and refresh circuits, forcing VOA and VOB low.
6 DT input Dead time control input; a resistor from DT to GND1 sets the dead time between output transitions, with the resistor range 10 kΩ to 500 kΩ.
7 NC unconnected No connect; do not connect to this pin.
8 VDD1 power_in Input supply voltage, referenced to GND1, with a recommended range of 2.5 V to 6.5 V; internally connected to pin 3 and recommended to be tied to the same input supply.
9 GNDB power_in Ground reference for output B, the reference for VOB and the VDDB supply.
10 VOB output Output B, the gate drive output for the low-side channel, referenced to GNDB and driven from VDDB; the output defaults low.
11 VDDB power_in Output B supply voltage, referenced to GNDB, with a recommended range of 4.5 V to 35 V.
12 NC unconnected No connect; do not connect to this pin.
13 NC unconnected No connect; do not connect to this pin.
14 GNDA power_in Ground reference for output A, the reference for VOA and the VDDA supply.
15 VOA output Output A, the gate drive output for the high-side channel, referenced to GNDA and driven from VDDA; the output defaults low.
16 VDDA power_in Output A supply voltage, referenced to GNDA, with a recommended range of 4.5 V to 35 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16-300mil
Category Power Management ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Logic Input Voltage VDD1 2.5 6.5 V 3
Output Supply Voltage VDDA, VDDB 4.5 35 V 3
Input Supply Current, Quiescent, Input A High or Input B High IDD1 (Q) 7.2 10 mA 3
Input Supply Current, Quiescent, Both Inputs Low IDD1 (Q) 1.4 2.4 mA 3
Output Supply Current, Per Channel, Quiescent, Output High IDD2 (Q) 1.4 2.6 mA Output Channel High 3
Output Supply Current, Per Channel, Quiescent, Output Low IDD2 (Q) 1.6 2.1 mA Output Channel Low 3
Input Currents IIA, IIB -1 0.01 1 µA 3
Input Threshold Logic High VIH 3.5 V VDD1 > 5 V 3
Input Threshold Logic Low VIL 1.5 V VDD1 > 5 V 3
VDD1 Positive Going UVLO Threshold VVDD1UV+ 2.45 2.5 V 3
VDD1 Negative Going UVLO Threshold VVDD1UV− 2.3 2.35 V 3
VDDA and VDDB Positive Going UVLO Threshold, Grade A VVDDAUV+, VVDDBUV+ 4.4 4.5 V Grade A 3
VDDA and VDDB Negative Going UVLO Threshold, Grade A VVDDAUV−, VVDDBUV− 4.1 4.2 V Grade A 3
Pull-Down NMOS On Resistance RDSON_N 0.6 1.6 Ω Tested at 250 mA, VDDx = 15 V 3
Pull-Up PMOS On Resistance RDSON_P 0.8 1.8 Ω Tested at 250 mA, VDDx = 15 V 3
Peak Current IPEAK 4 A VDDA,VDDB = 15 V, 2 Ω gate resistance 3
Pulse Width 50 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω 4
Propagation Delay, Rising Edge tDLH 19 25 33 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, and RG = 5.1 Ω 4
Propagation Delay, Falling Edge tDHL 21 30 44 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, and RG = 5.1 Ω 4
Time to Disable tDIS 21 25 44 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, and RG = 5.1 Ω 4
Time to Enable tEN 19 25 33 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, and RG = 5.1 Ω 4
Delay Skew tPSK 22 ns CL = 2.2 nF, RG = 5.1 Ω 4
Pulse Width Distortion tPWD 5 16 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω 4
Channel to Channel Matching tPSKCD 1.5 10 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, see Figure 19 4
Output Rise and Fall Time (10% to 90%) tR/tF 14 25 34 ns CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω, see Figure 26 4
Adjustable Dead Time DT 1809 2320 2831 ns RDT = 500 kΩ; CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω 4
Adjustable Dead Time DT 742 938 1135 ns RDT = 200 kΩ; CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω 4
Adjustable Dead Time DT 48 62 76 ns RDT = 10 kΩ; CL = 2.2 nF, VDD1 = 5 V, VDDA and VDDB = 15 V, RG = 5.1 Ω 4
Resistance, Input to Output RI-O 1013 Ω 4
IC Junction Temperature (Recommended Operating) TJ -40 125 °C 6
Supply Voltage VDD1 (Recommended Operating) VDD1 2.5 6.5 V Referenced to GND1 6
Supply Voltage VDDA and VDDB (Recommended Operating) VDDA, VDDB 4.5 35 V Referenced to GNDA, GNDB 6
Static Common-Mode Transient Immunity -150 150 kV/µs Static; output stays above 0.8 × VDDA/VDDB (high) or 0.8 V (low) 6
Dynamic Common-Mode Transient Immunity -150 150 kV/µs Dynamic; switching edge coincident with transient test pulse 6
Dead Time Resistor Range RDT 10 500 kΩ 6
Supply Voltage VDD1 (Absolute Maximum) VDD1 -0.2 7 V TA = 25°C 7
Supply Voltage VDDA and VDDB (Absolute Maximum) VDDA, VDDB -0.3 40 V TA = 25°C 7
Input Voltage VIA, VIB, DISABLE (Absolute Maximum) VIA, VIB, DISABLE -0.3 7 V TA = 25°C; rated with VDD1 above 2.5 V 7
Output Voltage VOA (max VDDA + 0.3 V) VOA -0.3 V TA = 25°C; maximum is VDDA + 0.3 V 7
Output Voltage VOB (max VDDB + 0.3 V) VOB -0.3 V TA = 25°C; maximum is VDDB + 0.3 V 7
Output Voltage VOA Transient VOA -2 V 200 ns transient; maximum is VDDA + 0.3 V 7
Output Voltage VOB Transient VOB -2 V 200 ns transient; maximum is VDDB + 0.3 V 7
Storage Temperature TST -55 150 °C 7
Junction Temperature (Absolute Maximum) TJ -40 125 °C 7
Common-Mode Transients CMH, CML -200 200 kV/µs Refers to transients across the insulation barrier 7
Thermal Resistance, Junction to Ambient θJA 45 °C/W 4-layer PCB, RI-16-2 package 7
Junction to Top Characterization Parameter ΨJT 16.67 °C/W 4-layer PCB, RI-16-2 package 7
Thermal Resistance, Junction to Ambient (Package Characteristics) θJA 45 °C/W Thermocouple located at center of package underside 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN VDE V 0884-11, each ADuM4221 is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on 5

CAD (KiCad official)

  • Symbol: ADUM4221ARIZ-RL
  • Footprint: Package_SO:SOIC-16W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: adum4221ariz-rl-etched.step / adum4221ariz-rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum4221ariz-rl.step / adum4221ariz-rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (19 pp, sha256 d450ccdeb8568e0f, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF