ADUM4135WBRWZ-RL

{
  "slug": "adum4135wbrwz-rl",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Isolators - Gate Drivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "adum4135wbrwz-rl",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "adum4135wbrwz-rl.kicad_sym",
    "adum4135wbrwz-rl.kicad_mod",
    "adum4135wbrwz-rl.glb",
    "adum4135wbrwz-rl.step",
    "adum4135wbrwz-rl.lbr",
    "docs/hero.png",
    "docs/adum4135wbrwz-rl-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "adum4135wbrwz-rl-hero.glb",
    "adum4135wbrwz-rl-hero.overlay.json"
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  "component": {
    "mpn": "ADUM4135WBRWZ-RL",
    "manufacturer": "Analog Devices",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Power Management (PMIC)",
    "subcategory": "Isolators - Gate Drivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603164549122314240",
    "parts": {
      "symbol": "adum4135wbrwz-rl.kicad_sym",
      "footprint": "adum4135wbrwz-rl.kicad_mod",
      "model_3d": "adum4135wbrwz-rl-hero.glb",
      "model_3d_plain": "adum4135wbrwz-rl.glb",
      "model_3d_step": "adum4135wbrwz-rl-etched.step",
      "model_3d_step_plain": "adum4135wbrwz-rl.step",
      "lbr": "adum4135wbrwz-rl.lbr"
    },
    "distributor_links": {
      "lcsc": "C17190273",
      "digikey": "505-ADUM4135WBRWZ-RLTR-ND",
      "mouser": "584-ADUM4135WBRWZ-RL"
    },
    "distributor_check": {
      "checked_at": "2026-10-09T18:07:46Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-ADUM4135WBRWZ-RLTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-ADUM4135WBRWZ-RL",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VSS1",
        "type": "power_in",
        "description": "Ground reference for the primary (logic) side; pin 1 is shorted internally to pin 8 per the package characteristics note."
      },
      {
        "number": "2",
        "name": "VI+",
        "type": "input",
        "description": "Positive logic CMOS drive signal input, referenced to VSS1, with logic-high threshold of 0.7 × VDD1 and logic-low threshold of 0.29 × VDD1 (Table 1)."
      },
      {
        "number": "3",
        "name": "VI−",
        "type": "input",
        "description": "Negative logic CMOS drive signal input, referenced to VSS1, using the same CMOS thresholds as VI+ (Table 1)."
      },
      {
        "number": "4",
        "name": "READY",
        "type": "output",
        "description": "Open-drain logic output that needs a pull-up resistor; high indicates the device is functional and ready, and READY low prevents the gate output from going high."
      },
      {
        "number": "5",
        "name": "FAULT",
        "type": "output",
        "description": "Open-drain logic output that needs a pull-up resistor; low indicates a desaturation fault, and a fault prevents the gate output from going high."
      },
      {
        "number": "6",
        "name": "RESET",
        "type": "input",
        "description": "CMOS input with an internal 300 kΩ (typical) pull-down; bring low for at least the 500 ns debounce time to clear a fault."
      },
      {
        "number": "7",
        "name": "VDD1",
        "type": "power_in",
        "description": "Primary-side logic supply, 2.5 V to 6 V referenced to VSS1."
      },
      {
        "number": "8",
        "name": "VSS1",
        "type": "power_in",
        "description": "Ground reference for the primary side; shorted internally to pin 1."
      },
      {
        "number": "9",
        "name": "VSS2",
        "type": "power_in",
        "description": "Negative secondary-side supply, −15 V to 0 V referenced to GND2; shorted internally to pin 16."
      },
      {
        "number": "10",
        "name": "DESAT",
        "type": "bidirectional",
        "description": "Desaturation detection pin, connected to an external current source or pull-up resistor; the comparator threshold is 9.2 V typical (8.73 V to 9.61 V), and a fault here asserts FAULT on the primary side."
      },
      {
        "number": "11",
        "name": "GND2",
        "type": "power_in",
        "description": "Secondary-side ground reference; connect to the emitter of the IGBT or source of the MOSFET being driven."
      },
      {
        "number": "12",
        "name": "VOUT_OFF",
        "type": "output",
        "description": "Gate drive output current path for the off signal; absolute maximum voltage is −0.3 V to VDD2 + 0.3 V referenced to VSS2."
      },
      {
        "number": "13",
        "name": "VDD2",
        "type": "power_in",
        "description": "Secondary-side supply, 12.25 V to 30 V referenced to GND2, with VDD2 − VSS2 not to exceed 30 V."
      },
      {
        "number": "14",
        "name": "VOUT_ON",
        "type": "output",
        "description": "Gate drive output current path for the on signal; absolute maximum voltage is −0.3 V to VDD2 + 0.3 V referenced to VSS2."
      },
      {
        "number": "15",
        "name": "GATE_SENSE",
        "type": "bidirectional",
        "description": "Gate voltage sense input for Miller clamping and Miller clamp output; connect to the gate of the driven device, or tie to VSS2 if the Miller clamp is not used."
      },
      {
        "number": "16",
        "name": "VSS2",
        "type": "power_in",
        "description": "Negative supply for the secondary side, −15 V to 0 V referenced to GND2; shorted internally to pin 9."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Figure 3 (Pin Configuration) is an image and its text was not extracted; the pin numbers, names and ; Datasheet text covers pages 1-9 and 13-17 only; pages 10-12 are absent from the supplied text. Pin d; Pin types for DESAT (pin 10) and GATE_SENSE (pin 15) are engineering judgement, since each both sens"
        ],
        "pages_sent": 13,
        "cost_usd": 0.0885,
        "at": "2026-10-09T18:05:32"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603164549122314240",
        "pages": 17,
        "sha256": "96bc348391f17b84",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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        "role": "plain",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
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        "file": "adum4135wbrwz-rl-etched.step",
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        "seat": "z = 0",
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        "sha256": "c3ddb2c72482acb1e858c85bf94238722cb4244712ade09d42ef23fd0817274e",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}