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ADUM4135WBRWZ-RL

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Analog Devices Isolators - Gate Drivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADUM4135WBRWZ-RL

Analog Devices · Isolators - Gate Drivers · SOIC-16

ADUM4135WBRWZ-RL from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS1 power_in Ground reference for the primary (logic) side; pin 1 is shorted internally to pin 8 per the package characteristics note.
2 VI+ input Positive logic CMOS drive signal input, referenced to VSS1, with logic-high threshold of 0.7 × VDD1 and logic-low threshold of 0.29 × VDD1 (Table 1).
3 VI− input Negative logic CMOS drive signal input, referenced to VSS1, using the same CMOS thresholds as VI+ (Table 1).
4 READY output Open-drain logic output that needs a pull-up resistor; high indicates the device is functional and ready, and READY low prevents the gate output from going high.
5 FAULT output Open-drain logic output that needs a pull-up resistor; low indicates a desaturation fault, and a fault prevents the gate output from going high.
6 RESET input CMOS input with an internal 300 kΩ (typical) pull-down; bring low for at least the 500 ns debounce time to clear a fault.
7 VDD1 power_in Primary-side logic supply, 2.5 V to 6 V referenced to VSS1.
8 VSS1 power_in Ground reference for the primary side; shorted internally to pin 1.
9 VSS2 power_in Negative secondary-side supply, −15 V to 0 V referenced to GND2; shorted internally to pin 16.
10 DESAT bidirectional Desaturation detection pin, connected to an external current source or pull-up resistor; the comparator threshold is 9.2 V typical (8.73 V to 9.61 V), and a fault here asserts FAULT on the primary side.
11 GND2 power_in Secondary-side ground reference; connect to the emitter of the IGBT or source of the MOSFET being driven.
12 VOUT_OFF output Gate drive output current path for the off signal; absolute maximum voltage is −0.3 V to VDD2 + 0.3 V referenced to VSS2.
13 VDD2 power_in Secondary-side supply, 12.25 V to 30 V referenced to GND2, with VDD2 − VSS2 not to exceed 30 V.
14 VOUT_ON output Gate drive output current path for the on signal; absolute maximum voltage is −0.3 V to VDD2 + 0.3 V referenced to VSS2.
15 GATE_SENSE bidirectional Gate voltage sense input for Miller clamping and Miller clamp output; connect to the gate of the driven device, or tie to VSS2 if the Miller clamp is not used.
16 VSS2 power_in Negative supply for the secondary side, −15 V to 0 V referenced to GND2; shorted internally to pin 9.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: ADUM4135WBRWZ-RL
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: adum4135wbrwz-rl-etched.step / adum4135wbrwz-rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum4135wbrwz-rl.step / adum4135wbrwz-rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (17 pp, sha256 96bc348391f17b84, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF