component
ADUM3200ARZ
Public Made by Adomby adom
Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADUM3200ARZ
Analog Devices · Digital Isolators · SOIC-8
ADUM3200ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, specified at 3.0 V to 5.5 V relative to GND1 (Table 29). |
| 2 | VIA | input | Logic input A; logic-high threshold is 0.7 VDDx and logic-low threshold is 0.3 VDDx (Table 24). |
| 3 | VIB | input | Logic input B; logic-high threshold is 0.7 VDDx and logic-low threshold is 0.3 VDDx (Table 24). |
| 4 | GND1 | power_in | Ground reference for isolator side 1 (Table 34). |
| 5 | GND2 | power_in | Ground reference for isolator side 2 (Table 34). |
| 6 | VOB | output | Logic output B; high output is VDDx − 0.1 V at IOx = −20 µA and low output is 0.1 V at IOx = 20 µA (Table 24). |
| 7 | VOA | output | Logic output A; high output is VDDx − 0.1 V at IOx = −20 µA and low output is 0.1 V at IOx = 20 µA (Table 24). |
| 8 | VDD2 | power_in | Supply voltage for isolator side 2, specified at 3.0 V to 5.5 V relative to GND2 (Table 29). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature (ADuM3200A/ADuM3201A) | TA | -40 | 105 | °C | ADuM3200A/ADuM3201A | 15 | |
| Supply Voltages (ADuM3200A/ADuM3201A) | VDD1, VDD2 | 3 | 5.5 | V | ADuM3200A/ADuM3201A; relative to respective ground | 15 | |
| Maximum Input Signal Rise and Fall Times | 1 | ms | 15 | ||||
| Storage Temperature | TST | -55 | 150 | °C | 16 | ||
| Ambient Operating Temperature | TA | -40 | 125 | °C | 16 | ||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | Relative to respective ground | 16 | |
| Average Output Current, per Pin | IO | -22 | 22 | mA | 16 | ||
| Common-Mode Transients | CML, CMH | -100 | 100 | kV/µs | Across the insulation barrier | 16 | |
| IC Junction-to-Case Thermal Resistance, Side 1 | θJCI | 46 | °C/W | Thermocouple located at center of package underside | 13 | ||
| IC Junction-to-Case Thermal Resistance, Side 2 | θJCO | 41 | °C/W | 13 | |||
| Data Rate (5 V, A grade) | 1 | Mbps | Within PWD limit | 4 | |||
| Propagation Delay (5 V, A grade) | tPHL, tPLH | 20 | 150 | ns | 50% input to 50% output | 4 | |
| Pulse Width Distortion (5 V, A grade) | PWD | 40 | ns | /tPLH − tPHL/ | 4 | ||
| Change vs. Temperature (5 V, A grade) | 6 | ps/°C | 4 | ||||
| Pulse Width (5 V, A grade) | PW | 1000 | ns | Within PWD limit | 4 | ||
| Propagation Delay Skew (5 V, A grade) | tPSK | 100 | ns | Between any two units | 4 | ||
| Channel Matching Codirectional (5 V, A grade) | tPSKCD | 50 | ns | 4 | |||
| Channel Matching Opposing-Direction (5 V, A grade) | tPSKOD | 50 | ns | 4 | |||
| Output Rise/Fall Time (5 V, A grade) | tR/tF | 10 | ns | 10% to 90% | 4 | ||
| ADuM3200 Supply Current IDD1 (5 V, 1 Mbps) | IDD1 | 1.3 | 1.8 | mA | No load; 1 Mbps | 4 | |
| ADuM3200 Supply Current IDD2 (5 V, 1 Mbps) | IDD2 | 1 | 1.6 | mA | No load; 1 Mbps | 4 | |
| ADuM3201 Supply Current IDD1 (5 V, 1 Mbps) | IDD1 | 1.1 | 1.6 | mA | No load; 1 Mbps | 4 | |
| ADuM3201 Supply Current IDD2 (5 V, 1 Mbps) | IDD2 | 1.3 | 1.9 | mA | No load; 1 Mbps | 4 | |
| Input Current per Channel (5 V) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDX | 4 |
| Quiescent Input Supply Current (5 V) | IDDI(Q) | 0.4 | 0.8 | mA | VIA = VIB = 0 V | 4 | |
| Quiescent Output Supply Current (5 V) | IDDO(Q) | 0.5 | 0.6 | mA | VIA = VIB = 0 V | 4 | |
| Common-Mode Transient Immunity (5 V) | /CM/ | 25 | 35 | kV/µs | VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V | 4 | |
| Data Rate (3.3 V, A grade) | 1 | Mbps | Within PWD limit | 5 | |||
| Propagation Delay (3.3 V, A grade) | tPHL, tPLH | 20 | 150 | ns | 50% input to 50% output | 5 | |
| Pulse Width Distortion ADuM3200 (3.3 V, A grade) | PWD | 40 | ns | /tPLH − tPHL/ | 5 | ||
| Pulse Width Distortion ADuM3201 (3.3 V, A grade) | PWD | 40 | ns | /tPLH − tPHL/ | 5 | ||
| Change vs. Temperature (3.3 V, A grade) | 6 | ps/°C | 5 | ||||
| Pulse Width (3.3 V, A grade) | PW | 1000 | ns | Within PWD limit | 5 | ||
| Propagation Delay Skew (3.3 V, A grade) | tPSK | 100 | ns | Between any two units | 5 | ||
| Channel Matching Codirectional (3.3 V, A grade) | tPSKCD | 50 | ns | 5 | |||
| Channel Matching Opposing-Direction (3.3 V, A grade) | tPSKOD | 50 | ns | 5 | |||
| Output Rise/Fall Time (3.3 V, A grade) | tR/tF | 3 | ns | 10% to 90% | 5 | ||
| ADuM3200 Supply Current IDD1 (3.3 V, 1 Mbps) | IDD1 | 0.8 | 1.3 | mA | No load; 1 Mbps | 5 | |
| ADuM3200 Supply Current IDD2 (3.3 V, 1 Mbps) | IDD2 | 0.7 | 1 | mA | No load; 1 Mbps | 5 | |
| ADuM3201 Supply Current IDD1 (3.3 V, 1 Mbps) | IDD1 | 0.7 | 1.3 | mA | No load; 1 Mbps | 5 | |
| ADuM3201 Supply Current IDD2 (3.3 V, 1 Mbps) | IDD2 | 0.8 | 1.6 | mA | No load; 1 Mbps | 5 | |
| Input Current per Channel (3.3 V) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDX | 5 |
| Quiescent Input Supply Current (3.3 V) | IDDI(Q) | 0.3 | 0.5 | mA | VIA = VIB = 0 V | 5 | |
| Quiescent Output Supply Current (3.3 V) | IDDO(Q) | 0.3 | 0.5 | mA | VIA = VIB = 0 V | 5 | |
| Common-Mode Transient Immunity (3.3 V) | /CM/ | 25 | 35 | kV/µs | VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM3200/ADuM3201 is proof-tested by applying an insulation test voltage ≥1050 VPEAK for 1 second (partial discharge detection limit = 5 pC). | 13 |
CAD (KiCad official)
- Symbol:
ADUM3200ARZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adum3200arz-etched.step/adum3200arz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum3200arz.step/adum3200arz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
93c1a9b1b427e31c, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADUM3200ARZ
**Analog Devices** · Digital Isolators · SOIC-8
ADUM3200ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, specified at 3.0 V to 5.5 V relative to GND1 (Table 29). |
| 2 | VIA | input | Logic input A; logic-high threshold is 0.7 VDDx and logic-low threshold is 0.3 VDDx (Table 24). |
| 3 | VIB | input | Logic input B; logic-high threshold is 0.7 VDDx and logic-low threshold is 0.3 VDDx (Table 24). |
| 4 | GND1 | power_in | Ground reference for isolator side 1 (Table 34). |
| 5 | GND2 | power_in | Ground reference for isolator side 2 (Table 34). |
| 6 | VOB | output | Logic output B; high output is VDDx − 0.1 V at IOx = −20 µA and low output is 0.1 V at IOx = 20 µA (Table 24). |
| 7 | VOA | output | Logic output A; high output is VDDx − 0.1 V at IOx = −20 µA and low output is 0.1 V at IOx = 20 µA (Table 24). |
| 8 | VDD2 | power_in | Supply voltage for isolator side 2, specified at 3.0 V to 5.5 V relative to GND2 (Table 29). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature (ADuM3200A/ADuM3201A) | TA | -40 | | 105 | °C | ADuM3200A/ADuM3201A | 15 |
| Supply Voltages (ADuM3200A/ADuM3201A) | VDD1, VDD2 | 3 | | 5.5 | V | ADuM3200A/ADuM3201A; relative to respective ground | 15 |
| Maximum Input Signal Rise and Fall Times | | | | 1 | ms | | 15 |
| Storage Temperature | TST | -55 | | 150 | °C | | 16 |
| Ambient Operating Temperature | TA | -40 | | 125 | °C | | 16 |
| Supply Voltages | VDD1, VDD2 | -0.5 | | 7 | V | Relative to respective ground | 16 |
| Average Output Current, per Pin | IO | -22 | | 22 | mA | | 16 |
| Common-Mode Transients | CML, CMH | -100 | | 100 | kV/µs | Across the insulation barrier | 16 |
| IC Junction-to-Case Thermal Resistance, Side 1 | θJCI | | 46 | | °C/W | Thermocouple located at center of package underside | 13 |
| IC Junction-to-Case Thermal Resistance, Side 2 | θJCO | | 41 | | °C/W | | 13 |
| Data Rate (5 V, A grade) | | | | 1 | Mbps | Within PWD limit | 4 |
| Propagation Delay (5 V, A grade) | tPHL, tPLH | | 20 | 150 | ns | 50% input to 50% output | 4 |
| Pulse Width Distortion (5 V, A grade) | PWD | | | 40 | ns | /tPLH − tPHL/ | 4 |
| Change vs. Temperature (5 V, A grade) | | | | 6 | ps/°C | | 4 |
| Pulse Width (5 V, A grade) | PW | 1000 | | | ns | Within PWD limit | 4 |
| Propagation Delay Skew (5 V, A grade) | tPSK | | | 100 | ns | Between any two units | 4 |
| Channel Matching Codirectional (5 V, A grade) | tPSKCD | | | 50 | ns | | 4 |
| Channel Matching Opposing-Direction (5 V, A grade) | tPSKOD | | | 50 | ns | | 4 |
| Output Rise/Fall Time (5 V, A grade) | tR/tF | | | 10 | ns | 10% to 90% | 4 |
| ADuM3200 Supply Current IDD1 (5 V, 1 Mbps) | IDD1 | | 1.3 | 1.8 | mA | No load; 1 Mbps | 4 |
| ADuM3200 Supply Current IDD2 (5 V, 1 Mbps) | IDD2 | | 1 | 1.6 | mA | No load; 1 Mbps | 4 |
| ADuM3201 Supply Current IDD1 (5 V, 1 Mbps) | IDD1 | | 1.1 | 1.6 | mA | No load; 1 Mbps | 4 |
| ADuM3201 Supply Current IDD2 (5 V, 1 Mbps) | IDD2 | | 1.3 | 1.9 | mA | No load; 1 Mbps | 4 |
| Input Current per Channel (5 V) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDX | 4 |
| Quiescent Input Supply Current (5 V) | IDDI(Q) | | 0.4 | 0.8 | mA | VIA = VIB = 0 V | 4 |
| Quiescent Output Supply Current (5 V) | IDDO(Q) | | 0.5 | 0.6 | mA | VIA = VIB = 0 V | 4 |
| Common-Mode Transient Immunity (5 V) | /CM/ | 25 | 35 | | kV/µs | VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V | 4 |
| Data Rate (3.3 V, A grade) | | | | 1 | Mbps | Within PWD limit | 5 |
| Propagation Delay (3.3 V, A grade) | tPHL, tPLH | | 20 | 150 | ns | 50% input to 50% output | 5 |
| Pulse Width Distortion ADuM3200 (3.3 V, A grade) | PWD | | | 40 | ns | /tPLH − tPHL/ | 5 |
| Pulse Width Distortion ADuM3201 (3.3 V, A grade) | PWD | | | 40 | ns | /tPLH − tPHL/ | 5 |
| Change vs. Temperature (3.3 V, A grade) | | | | 6 | ps/°C | | 5 |
| Pulse Width (3.3 V, A grade) | PW | 1000 | | | ns | Within PWD limit | 5 |
| Propagation Delay Skew (3.3 V, A grade) | tPSK | | | 100 | ns | Between any two units | 5 |
| Channel Matching Codirectional (3.3 V, A grade) | tPSKCD | | | 50 | ns | | 5 |
| Channel Matching Opposing-Direction (3.3 V, A grade) | tPSKOD | | | 50 | ns | | 5 |
| Output Rise/Fall Time (3.3 V, A grade) | tR/tF | | | 3 | ns | 10% to 90% | 5 |
| ADuM3200 Supply Current IDD1 (3.3 V, 1 Mbps) | IDD1 | | 0.8 | 1.3 | mA | No load; 1 Mbps | 5 |
| ADuM3200 Supply Current IDD2 (3.3 V, 1 Mbps) | IDD2 | | 0.7 | 1 | mA | No load; 1 Mbps | 5 |
| ADuM3201 Supply Current IDD1 (3.3 V, 1 Mbps) | IDD1 | | 0.7 | 1.3 | mA | No load; 1 Mbps | 5 |
| ADuM3201 Supply Current IDD2 (3.3 V, 1 Mbps) | IDD2 | | 0.8 | 1.6 | mA | No load; 1 Mbps | 5 |
| Input Current per Channel (3.3 V) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDX | 5 |
| Quiescent Input Supply Current (3.3 V) | IDDI(Q) | | 0.3 | 0.5 | mA | VIA = VIB = 0 V | 5 |
| Quiescent Output Supply Current (3.3 V) | IDDO(Q) | | 0.3 | 0.5 | mA | VIA = VIB = 0 V | 5 |
| Common-Mode Transient Immunity (3.3 V) | /CM/ | 25 | 35 | | kV/µs | VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V | 6 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM3200/ADuM3201 is proof-tested by applying an insulation test voltage ≥1050 VPEAK for 1 second (partial discharge detection limit = 5 pC). | 13 |
## CAD (KiCad official)
- Symbol: `ADUM3200ARZ`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `adum3200arz-etched.step` / `adum3200arz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adum3200arz.step` / `adum3200arz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADUM3200_3201.pdf) (24 pp, sha256 `93c1a9b1b427e31c`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adum3200arz-datasheet.pdf)