# ADS8598HIPMR

**Texas Instruments** · Analog To Digital Converters (ADCs) · LQFP-64(10x10)

ADS8598HIPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V recommended); decouple to the closest AGND pins. |
| 2 | AGND | power_in | Analog ground pin. |
| 3 | OS0 | input | Oversampling mode control pin; OS[2:0] set the oversampling ratio with OS2 as MSB and OS0 as LSB, and code 111 is invalid. |
| 4 | OS1 | input | Oversampling mode control pin; OS[2:0] set the oversampling ratio with OS2 as MSB and OS0 as LSB, and code 111 is invalid. |
| 5 | OS2 | input | Oversampling mode control pin (MSB of OS[2:0]); code 111 is invalid. |
| 6 | PAR/SER/BYTE SEL | input | Logic input that selects parallel interface mode when low; when high, the DB15/BYTE SEL pin selects serial or parallel byte interface mode. |
| 7 | STBY | input | Active-low logic input that puts the device into standby or shutdown power-down mode (mode selected by the RANGE pin); asynchronous. |
| 8 | RANGE | input | When STBY is high, high selects the ±10 V input range and low selects ±5 V; when STBY is low, high selects standby and low selects shutdown mode. |
| 9 | CONVSTA | input | Active-high conversion start input that samples and starts conversion for channels 1-4; must be tied to CONVSTB in oversampling mode. |
| 10 | CONVSTB | input | Active-high conversion start input that samples and starts conversion for channels 5-8; must be tied to CONVSTA in oversampling mode. |
| 11 | RESET | input | Active-high reset of the device digital logic that must be applied after power-up and after shutdown recovery. |
| 12 | RD/SCLK | input | Active-low read input in parallel and parallel byte modes; serial clock input in serial interface mode. |
| 13 | CS | input | Active-low chip-select input; a rising edge tri-states all data lines. |
| 14 | BUSY | output | Active-high output that indicates an ongoing conversion, going high after the rising edges of CONVSTA and CONVSTB. |
| 15 | FRSTDATA | output | Active-high output that indicates the data being read back belong to channel 1. |
| 16 | DB0 | output | Data output DB0 (LSB) in parallel interface mode. |
| 17 | DB1 | output | Data output DB1 in parallel interface mode. |
| 18 | DB2 | output | Data output DB2 in parallel interface mode. |
| 19 | DB3 | output | Data output DB3 in parallel interface mode. |
| 20 | DB4 | output | Data output DB4 in parallel interface mode. |
| 21 | DB5 | output | Data output DB5 in parallel interface mode. |
| 22 | DB6 | output | Data output DB6 in parallel interface mode. |
| 23 | DVDD | power_in | Digital supply pin (2.3 V minimum, up to AVDD); decouple with AGND on pin 26. |
| 24 | DB7/DOUTA | output | Data output DB7 in parallel modes; serial data output DOUTA for channels 1-4 in serial mode. |
| 25 | DB8/DOUTB | output | Data output DB8 in parallel interface mode; serial data output DOUTB for channels 5-8 in serial mode. |
| 26 | AGND | power_in | Analog ground pin; the reference for decoupling DVDD. |
| 27 | DB9 | output | Data output DB9 in parallel interface mode. |
| 28 | DB10 | output | Data output DB10 in parallel interface mode. |
| 29 | DB11 | output | Data output DB11 in parallel interface mode. |
| 30 | DB12 | output | Data output DB12 in parallel interface mode. |
| 31 | DB13 | output | Data output DB13 in parallel interface mode; must be tied to AGND or logic low when not in parallel mode. |
| 32 | DB14/HBEN | bidirectional | Data output DB14 in parallel mode; in parallel byte mode it selects MSB-byte-first when high, and in serial mode it must be tied low. |
| 33 | DB15/BYTE SEL | bidirectional | Data output DB15 (MSB) in parallel mode; when not in parallel mode, a high input selects parallel byte interface and a low input selects serial interface. |
| 34 | REFSEL | input | Active-high input that enables the internal 2.5 V reference; a low level selects external reference mode at REFIN/REFOUT. |
| 35 | AGND | power_in | Analog ground pin. |
| 36 | REGCAP1 | output | Output pin 1 of the internal voltage regulator; decouple separately to AGND with a 1 µF capacitor. |
| 37 | AVDD | power_in | Analog supply pin; decouple to the closest AGND pins. |
| 38 | AVDD | power_in | Analog supply pin; decouple to the closest AGND pins. |
| 39 | REGCAP2 | output | Output pin 2 of the internal voltage regulator; decouple separately to AGND with a 1 µF capacitor. |
| 40 | AGND | power_in | Analog ground pin. |
| 41 | AGND | power_in | Analog ground pin. |
| 42 | REFIN/REFOUT | bidirectional | Internal 2.5 V reference output when REFSEL is high, or high-impedance external 2.5 V reference input when REFSEL is low; decouple with a 10 µF capacitor to REFGND (pin 43). |
| 43 | REFGND | power_in | Reference ground pin; short to the analog ground plane and decouple with REFIN/REFOUT using a 10 µF capacitor. |
| 44 | REFCAPA | output | Reference amplifier output; short to REFCAPB and decouple to AGND with a low-ESR 10 µF ceramic capacitor. |
| 45 | REFCAPB | output | Reference amplifier output; short to REFCAPA and decouple to AGND with a low-ESR 10 µF ceramic capacitor. |
| 46 | REFGND | power_in | Reference ground pin; short to the analog ground plane. |
| 47 | AGND | power_in | Analog ground pin. |
| 48 | AVDD | power_in | Analog supply pin; decouple to the closest AGND pins. |
| 49 | AIN_1P | passive | Analog input channel 1 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 50 | AIN_1GND | passive | Analog input channel 1 negative input. |
| 51 | AIN_2P | passive | Analog input channel 2 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 52 | AIN_2GND | passive | Analog input channel 2 negative input. |
| 53 | AIN_3P | passive | Analog input channel 3 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 54 | AIN_3GND | passive | Analog input channel 3 negative input. |
| 55 | AIN_4P | passive | Analog input channel 4 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 56 | AIN_4GND | passive | Analog input channel 4 negative input. |
| 57 | AIN_5P | passive | Analog input channel 5 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 58 | AIN_5GND | passive | Analog input channel 5 negative input. |
| 59 | AIN_6P | passive | Analog input channel 6 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 60 | AIN_6GND | passive | Analog input channel 6 negative input. |
| 61 | AIN_7P | passive | Analog input channel 7 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 62 | AIN_7GND | passive | Analog input channel 7 negative input. |
| 63 | AIN_8P | passive | Analog input channel 8 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |
| 64 | AIN_8GND | passive | Analog input channel 8 negative input. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | ADC/DAC/Data Conversion |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `ADS8598HIPMR`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `ads8598hipmr-etched.step` / `ads8598hipmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8598hipmr.step` / `ads8598hipmr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads8598h) (66 pp, sha256 `39c586093e7c339e`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ads8598hipmr-datasheet.pdf)