component
ADS8598HIPMR
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Texas Instruments Analog To Digital Converters (ADCs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+101@@ -0,0 +1,101 @@+# ADS8598HIPMR++**Texas Instruments** · Analog To Digital Converters (ADCs) · LQFP-64(10x10)++ADS8598HIPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V recommended); decouple to the closest AGND pins. |+| 2 | AGND | power_in | Analog ground pin. |+| 3 | OS0 | input | Oversampling mode control pin; OS[2:0] set the oversampling ratio with OS2 as MSB and OS0 as LSB, and code 111 is invalid. |+| 4 | OS1 | input | Oversampling mode control pin; OS[2:0] set the oversampling ratio with OS2 as MSB and OS0 as LSB, and code 111 is invalid. |+| 5 | OS2 | input | Oversampling mode control pin (MSB of OS[2:0]); code 111 is invalid. |+| 6 | PAR/SER/BYTE SEL | input | Logic input that selects parallel interface mode when low; when high, the DB15/BYTE SEL pin selects serial or parallel byte interface mode. |+| 7 | STBY | input | Active-low logic input that puts the device into standby or shutdown power-down mode (mode selected by the RANGE pin); asynchronous. |+| 8 | RANGE | input | When STBY is high, high selects the ±10 V input range and low selects ±5 V; when STBY is low, high selects standby and low selects shutdown mode. |+| 9 | CONVSTA | input | Active-high conversion start input that samples and starts conversion for channels 1-4; must be tied to CONVSTB in oversampling mode. |+| 10 | CONVSTB | input | Active-high conversion start input that samples and starts conversion for channels 5-8; must be tied to CONVSTA in oversampling mode. |+| 11 | RESET | input | Active-high reset of the device digital logic that must be applied after power-up and after shutdown recovery. |+| 12 | RD/SCLK | input | Active-low read input in parallel and parallel byte modes; serial clock input in serial interface mode. |+| 13 | CS | input | Active-low chip-select input; a rising edge tri-states all data lines. |+| 14 | BUSY | output | Active-high output that indicates an ongoing conversion, going high after the rising edges of CONVSTA and CONVSTB. |+| 15 | FRSTDATA | output | Active-high output that indicates the data being read back belong to channel 1. |+| 16 | DB0 | output | Data output DB0 (LSB) in parallel interface mode. |+| 17 | DB1 | output | Data output DB1 in parallel interface mode. |+| 18 | DB2 | output | Data output DB2 in parallel interface mode. |+| 19 | DB3 | output | Data output DB3 in parallel interface mode. |+| 20 | DB4 | output | Data output DB4 in parallel interface mode. |+| 21 | DB5 | output | Data output DB5 in parallel interface mode. |+| 22 | DB6 | output | Data output DB6 in parallel interface mode. |+| 23 | DVDD | power_in | Digital supply pin (2.3 V minimum, up to AVDD); decouple with AGND on pin 26. |+| 24 | DB7/DOUTA | output | Data output DB7 in parallel modes; serial data output DOUTA for channels 1-4 in serial mode. |+| 25 | DB8/DOUTB | output | Data output DB8 in parallel interface mode; serial data output DOUTB for channels 5-8 in serial mode. |+| 26 | AGND | power_in | Analog ground pin; the reference for decoupling DVDD. |+| 27 | DB9 | output | Data output DB9 in parallel interface mode. |+| 28 | DB10 | output | Data output DB10 in parallel interface mode. |+| 29 | DB11 | output | Data output DB11 in parallel interface mode. |+| 30 | DB12 | output | Data output DB12 in parallel interface mode. |+| 31 | DB13 | output | Data output DB13 in parallel interface mode; must be tied to AGND or logic low when not in parallel mode. |+| 32 | DB14/HBEN | bidirectional | Data output DB14 in parallel mode; in parallel byte mode it selects MSB-byte-first when high, and in serial mode it must be tied low. |+| 33 | DB15/BYTE SEL | bidirectional | Data output DB15 (MSB) in parallel mode; when not in parallel mode, a high input selects parallel byte interface and a low input selects serial interface. |+| 34 | REFSEL | input | Active-high input that enables the internal 2.5 V reference; a low level selects external reference mode at REFIN/REFOUT. |+| 35 | AGND | power_in | Analog ground pin. |+| 36 | REGCAP1 | output | Output pin 1 of the internal voltage regulator; decouple separately to AGND with a 1 µF capacitor. |+| 37 | AVDD | power_in | Analog supply pin; decouple to the closest AGND pins. |+| 38 | AVDD | power_in | Analog supply pin; decouple to the closest AGND pins. |+| 39 | REGCAP2 | output | Output pin 2 of the internal voltage regulator; decouple separately to AGND with a 1 µF capacitor. |+| 40 | AGND | power_in | Analog ground pin. |+| 41 | AGND | power_in | Analog ground pin. |+| 42 | REFIN/REFOUT | bidirectional | Internal 2.5 V reference output when REFSEL is high, or high-impedance external 2.5 V reference input when REFSEL is low; decouple with a 10 µF capacitor to REFGND (pin 43). |+| 43 | REFGND | power_in | Reference ground pin; short to the analog ground plane and decouple with REFIN/REFOUT using a 10 µF capacitor. |+| 44 | REFCAPA | output | Reference amplifier output; short to REFCAPB and decouple to AGND with a low-ESR 10 µF ceramic capacitor. |+| 45 | REFCAPB | output | Reference amplifier output; short to REFCAPA and decouple to AGND with a low-ESR 10 µF ceramic capacitor. |+| 46 | REFGND | power_in | Reference ground pin; short to the analog ground plane. |+| 47 | AGND | power_in | Analog ground pin. |+| 48 | AVDD | power_in | Analog supply pin; decouple to the closest AGND pins. |+| 49 | AIN_1P | passive | Analog input channel 1 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 50 | AIN_1GND | passive | Analog input channel 1 negative input. |+| 51 | AIN_2P | passive | Analog input channel 2 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 52 | AIN_2GND | passive | Analog input channel 2 negative input. |+| 53 | AIN_3P | passive | Analog input channel 3 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 54 | AIN_3GND | passive | Analog input channel 3 negative input. |+| 55 | AIN_4P | passive | Analog input channel 4 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 56 | AIN_4GND | passive | Analog input channel 4 negative input. |+| 57 | AIN_5P | passive | Analog input channel 5 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 58 | AIN_5GND | passive | Analog input channel 5 negative input. |+| 59 | AIN_6P | passive | Analog input channel 6 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 60 | AIN_6GND | passive | Analog input channel 6 negative input. |+| 61 | AIN_7P | passive | Analog input channel 7 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 62 | AIN_7GND | passive | Analog input channel 7 negative input. |+| 63 | AIN_8P | passive | Analog input channel 8 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance). |+| 64 | AIN_8GND | passive | Analog input channel 8 negative input. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-64(10x10) |+| Category | ADC/DAC/Data Conversion |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `ADS8598HIPMR`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `ads8598hipmr-etched.step` / `ads8598hipmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8598hipmr.step` / `ads8598hipmr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads8598h) (66 pp, sha256 `39c586093e7c339e`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads8598hipmr-datasheet.pdf)
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decouple to the closest AGND pins."+ },+ {+ "number": "2",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin."+ },+ {+ "number": "3",+ "name": "OS0",+ "type": "input",+ "description": "Oversampling mode control pin; OS[2:0] set the oversampling ratio with OS2 as MSB and OS0 as LSB, and code 111 is invalid."+ },+ {+ "number": "4",+ "name": "OS1",+ "type": "input",+ "description": "Oversampling mode control pin; OS[2:0] set the oversampling ratio with OS2 as MSB and OS0 as LSB, and code 111 is invalid."+ },+ {+ "number": "5",+ "name": "OS2",+ "type": "input",+ "description": "Oversampling mode control pin (MSB of OS[2:0]); code 111 is invalid."+ },+ {+ "number": "6",+ "name": "PAR/SER/BYTE SEL",+ "type": "input",+ "description": "Logic input that selects parallel interface mode when low; when high, the DB15/BYTE SEL pin selects serial or parallel byte interface mode."+ },+ {+ "number": "7",+ "name": "STBY",+ "type": "input",+ "description": "Active-low logic input that puts the device into standby or shutdown power-down mode (mode selected by the RANGE pin); asynchronous."+ },+ {+ "number": "8",+ "name": "RANGE",+ "type": "input",+ "description": "When STBY is high, high selects the ±10 V input range and low selects ±5 V; when STBY is low, high selects standby and low selects shutdown mode."+ },+ {+ "number": "9",+ "name": "CONVSTA",+ "type": "input",+ "description": "Active-high conversion start input that samples and starts conversion for channels 1-4; must be tied to CONVSTB in oversampling mode."+ },+ {+ "number": "10",+ "name": "CONVSTB",+ "type": "input",+ "description": "Active-high conversion start input that samples and starts conversion for channels 5-8; must be tied to CONVSTA in oversampling mode."+ },+ {+ "number": "11",+ "name": "RESET",+ "type": "input",+ "description": "Active-high reset of the device digital logic that must be applied after power-up and after shutdown recovery."+ },+ {+ "number": "12",+ "name": "RD/SCLK",+ "type": "input",+ "description": "Active-low read input in parallel and parallel byte modes; serial clock input in serial interface mode."+ },+ {+ "number": "13",+ "name": "CS",+ "type": "input",+ "description": "Active-low chip-select input; a rising edge tri-states all data lines."+ },+ {+ "number": "14",+ "name": "BUSY",+ "type": "output",+ "description": "Active-high output that indicates an ongoing conversion, going high after the rising edges of CONVSTA and CONVSTB."+ },+ {+ "number": "15",+ "name": "FRSTDATA",+ "type": "output",+ "description": "Active-high output that indicates the data being read back belong to channel 1."+ },+ {+ "number": "16",+ "name": "DB0",+ "type": "output",+ "description": "Data output DB0 (LSB) in parallel interface mode."+ },+ {+ "number": "17",+ "name": "DB1",+ "type": "output",+ "description": "Data output DB1 in parallel interface mode."+ },+ {+ "number": "18",+ "name": "DB2",+ "type": "output",+ "description": "Data output DB2 in parallel interface mode."+ },+ {+ "number": "19",+ "name": "DB3",+ "type": "output",+ "description": "Data output DB3 in parallel interface mode."+ },+ {+ "number": "20",+ "name": "DB4",+ "type": "output",+ "description": "Data output DB4 in parallel interface mode."+ },+ {+ "number": "21",+ "name": "DB5",+ "type": "output",+ "description": "Data output DB5 in parallel interface mode."+ },+ {+ "number": "22",+ "name": "DB6",+ "type": "output",+ "description": "Data output DB6 in parallel interface mode."+ },+ {+ "number": "23",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital supply pin (2.3 V minimum, up to AVDD); decouple with AGND on pin 26."+ },+ {+ "number": "24",+ "name": "DB7/DOUTA",+ "type": "output",+ "description": "Data output DB7 in parallel modes; serial data output DOUTA for channels 1-4 in serial mode."+ },+ {+ "number": "25",+ "name": "DB8/DOUTB",+ "type": "output",+ "description": "Data output DB8 in parallel interface mode; serial data output DOUTB for channels 5-8 in serial mode."+ },+ {+ "number": "26",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; the reference for decoupling DVDD."+ },+ {+ "number": "27",+ "name": "DB9",+ "type": "output",+ "description": "Data output DB9 in parallel interface mode."+ },+ {+ "number": "28",+ "name": "DB10",+ "type": "output",+ "description": "Data output DB10 in parallel interface mode."+ },+ {+ "number": "29",+ "name": "DB11",+ "type": "output",+ "description": "Data output DB11 in parallel interface mode."+ },+ {+ "number": "30",+ "name": "DB12",+ "type": "output",+ "description": "Data output DB12 in parallel interface mode."+ },+ {+ "number": "31",+ "name": "DB13",+ "type": "output",+ "description": "Data output DB13 in parallel interface mode; must be tied to AGND or logic low when not in parallel mode."+ },+ {+ "number": "32",+ "name": "DB14/HBEN",+ "type": "bidirectional",+ "description": "Data output DB14 in parallel mode; in parallel byte mode it selects MSB-byte-first when high, and in serial mode it must be tied low."+ },+ {+ "number": "33",+ "name": "DB15/BYTE SEL",+ "type": "bidirectional",+ "description": "Data output DB15 (MSB) in parallel mode; when not in parallel mode, a high input selects parallel byte interface and a low input selects serial interface."+ },+ {+ "number": "34",+ "name": "REFSEL",+ "type": "input",+ "description": "Active-high input that enables the internal 2.5 V reference; a low level selects external reference mode at REFIN/REFOUT."+ },+ {+ "number": "35",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin."+ },+ {+ "number": "36",+ "name": "REGCAP1",+ "type": "output",+ "description": "Output pin 1 of the internal voltage regulator; decouple separately to AGND with a 1 µF capacitor."+ },+ {+ "number": "37",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog supply pin; decouple to the closest AGND pins."+ },+ {+ "number": "38",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog supply pin; decouple to the closest AGND pins."+ },+ {+ "number": "39",+ "name": "REGCAP2",+ "type": "output",+ "description": "Output pin 2 of the internal voltage regulator; decouple separately to AGND with a 1 µF capacitor."+ },+ {+ "number": "40",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin."+ },+ {+ "number": "41",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin."+ },+ {+ "number": "42",+ "name": "REFIN/REFOUT",+ "type": "bidirectional",+ "description": "Internal 2.5 V reference output when REFSEL is high, or high-impedance external 2.5 V reference input when REFSEL is low; decouple with a 10 µF capacitor to REFGND (pin 43)."+ },+ {+ "number": "43",+ "name": "REFGND",+ "type": "power_in",+ "description": "Reference ground pin; short to the analog ground plane and decouple with REFIN/REFOUT using a 10 µF capacitor."+ },+ {+ "number": "44",+ "name": "REFCAPA",+ "type": "output",+ "description": "Reference amplifier output; short to REFCAPB and decouple to AGND with a low-ESR 10 µF ceramic capacitor."+ },+ {+ "number": "45",+ "name": "REFCAPB",+ "type": "output",+ "description": "Reference amplifier output; short to REFCAPA and decouple to AGND with a low-ESR 10 µF ceramic capacitor."+ },+ {+ "number": "46",+ "name": "REFGND",+ "type": "power_in",+ "description": "Reference ground pin; short to the analog ground plane."+ },+ {+ "number": "47",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin."+ },+ {+ "number": "48",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog supply pin; decouple to the closest AGND pins."+ },+ {+ "number": "49",+ "name": "AIN_1P",+ "type": "passive",+ "description": "Analog input channel 1 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "50",+ "name": "AIN_1GND",+ "type": "passive",+ "description": "Analog input channel 1 negative input."+ },+ {+ "number": "51",+ "name": "AIN_2P",+ "type": "passive",+ "description": "Analog input channel 2 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "52",+ "name": "AIN_2GND",+ "type": "passive",+ "description": "Analog input channel 2 negative input."+ },+ {+ "number": "53",+ "name": "AIN_3P",+ "type": "passive",+ "description": "Analog input channel 3 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "54",+ "name": "AIN_3GND",+ "type": "passive",+ "description": "Analog input channel 3 negative input."+ },+ {+ "number": "55",+ "name": "AIN_4P",+ "type": "passive",+ "description": "Analog input channel 4 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "56",+ "name": "AIN_4GND",+ "type": "passive",+ "description": "Analog input channel 4 negative input."+ },+ {+ "number": "57",+ "name": "AIN_5P",+ "type": "passive",+ "description": "Analog input channel 5 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "58",+ "name": "AIN_5GND",+ "type": "passive",+ "description": "Analog input channel 5 negative input."+ },+ {+ "number": "59",+ "name": "AIN_6P",+ "type": "passive",+ "description": "Analog input channel 6 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "60",+ "name": "AIN_6GND",+ "type": "passive",+ "description": "Analog input channel 6 negative input."+ },+ {+ "number": "61",+ "name": "AIN_7P",+ "type": "passive",+ "description": "Analog input channel 7 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "62",+ "name": "AIN_7GND",+ "type": "passive",+ "description": "Analog input channel 7 negative input."+ },+ {+ "number": "63",+ "name": "AIN_8P",+ "type": "passive",+ "description": "Analog input channel 8 positive input (±10 V or ±5 V single-ended bipolar range, 1 MΩ input impedance)."+ },+ {+ "number": "64",+ "name": "AIN_8GND",+ "type": "passive",+ "description": "Analog input channel 8 negative input."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet pages provided (25 of 66) include the pin diagram and pin-function table for the PM (L; Pin types use KiCad classes mapped from the datasheet's codes: AI (analog input) mapped to passive, ; The datasheet does not give a package outline drawing or pin-1 marking in the supplied pages. Pin 1 "+ ],+ "pages_sent": 25,+ "cost_usd": 0.1788,+ "at": "2026-10-07T21:32:16"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ads8598h",+ "pages": 66,+ "sha256": "39c586093e7c339e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ads8598hipmr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ads8598hipmr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "194fc9c96074351003bb4af8c799fcb0aa25d985959246cc2089eefac7bce0ea",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}