component
ADS8568SRGCR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ads8568srgcr",
"title": "ADS8568SRGCR",
"brief": "Texas Instruments Analog To Digital Converters (ADCs), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"adc-dac-data conversion",
"ads8568srgcr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "ADS8568SRGCR",
"manufacturer": "Texas Instruments",
"package": "VQFN-64-EP(9x9)",
"pin_count": 65,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Analog To Digital Converters (ADCs)",
"datasheet": "https://www.ti.com/lit/ds/symlink/ads8568.pdf",
"parts": {
"symbol": "ads8568srgcr.kicad_sym",
"footprint": "ads8568srgcr.kicad_mod",
"model_3d": "ads8568srgcr-hero.glb",
"model_3d_plain": "ads8568srgcr-etched.glb",
"model_3d_step": "ads8568srgcr-etched.step",
"model_3d_step_plain": "ads8568srgcr.step",
"lbr": "ads8568srgcr.lbr"
},
"distributor_links": {
"lcsc": "C2670813",
"digikey": "296-ADS8568SRGCRTR-ND",
"mouser": "595-ADS8568SRGCR"
},
"distributor_check": {
"checked_at": "2026-11-05T22:36:16Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-ADS8568SRGCRTR-ND",
"status": "found"
},
"mouser": {
"pn": "595-ADS8568SRGCR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "HVSS",
"type": "power_in",
"description": "Negative supply voltage for the analog inputs, specified from -16.5 V to -5.0 V with -15.0 V nominal."
},
{
"number": "2",
"name": "CH_D1",
"type": "passive",
"description": "Analog input of channel D1; input range is set by the RANGE pin or CONFIG bit C19 and the channel can be powered down with CONFIG bit C18."
},
{
"number": "3",
"name": "REFDN",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair D reference, to be connected to the decoupling capacitor and AGND."
},
{
"number": "4",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, specified from 4.5 V to 5.5 V with 5.0 V nominal."
},
{
"number": "5",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to the analog ground plane."
},
{
"number": "6",
"name": "REFDP",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair D reference, to be connected to the decoupling capacitor."
},
{
"number": "7",
"name": "CH_D0",
"type": "passive",
"description": "Analog input of channel D0; input range is set by the RANGE pin or CONFIG bit C19 and the channel can be powered down with CONFIG bit C18."
},
{
"number": "8",
"name": "PAR/SER",
"type": "input",
"description": "Interface mode selection input; low selects the parallel interface and high enables the serial interface."
},
{
"number": "9",
"name": "STBY",
"type": "input",
"description": "In hardware mode, low powers down the entire device including clock source and reference; in software mode, connect to DGND or DVDD."
},
{
"number": "10",
"name": "RESET",
"type": "input",
"description": "Active-high reset input that aborts conversions and resets CONFIG to 000003FFh; a valid reset pulse must be at least 50 ns long."
},
{
"number": "11",
"name": "REFEN/WR",
"type": "input",
"description": "In hardware mode, high enables the internal reference and low applies an external reference at REFIO; in software mode it is the write input."
},
{
"number": "12",
"name": "RD",
"type": "input",
"description": "Read data input; when low the parallel data output is enabled if CS is low, and it must be connected to DGND."
},
{
"number": "13",
"name": "CS/FS",
"type": "input",
"description": "Chip-select input enables the parallel interface when low; in serial mode it is the frame synchronization input, where the FS falling edge controls the frame transfer."
},
{
"number": "14",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, specified from 4.5 V to 5.5 V with 5.0 V nominal."
},
{
"number": "15",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to the analog ground plane."
},
{
"number": "16",
"name": "DB15/SDO_D",
"type": "bidirectional",
"description": "Data bit 15 (MSB) input/output; it is the SDO_D data output when SEL_CD = 1 and must be tied to DGND when SEL_CD = 0."
},
{
"number": "17",
"name": "DB14/SDO_C",
"type": "bidirectional",
"description": "Data bit 14 input/output; it is the SDO_C data output when SEL_CD = 1 and must be tied to DGND when SEL_CD = 0."
},
{
"number": "18",
"name": "DB13/SDO_B",
"type": "bidirectional",
"description": "Data bit 13 input/output; it is the SDO_B data output when SEL_B = 1 and must be tied to DGND when SEL_B = 0."
},
{
"number": "19",
"name": "DB12/SDO_A",
"type": "bidirectional",
"description": "Data bit 12 input/output; it is the data output for channel pair A."
},
{
"number": "20",
"name": "DB11/REFBUFEN",
"type": "bidirectional",
"description": "Data bit 11 input/output; in hardware mode low enables all internal reference buffers (mandatory if the internal reference is used) and high disables them."
},
{
"number": "21",
"name": "DB10/SCLK",
"type": "bidirectional",
"description": "Data bit 10 input/output; serves as the serial interface clock input."
},
{
"number": "22",
"name": "DB9/SDI",
"type": "bidirectional",
"description": "Data bit 9 input/output; connect to DGND in hardware mode and serves as the serial data input in software mode."
},
{
"number": "23",
"name": "DB8/DCEN",
"type": "bidirectional",
"description": "Data bit 8 input/output; daisy-chain enable input, connected to DGND if daisy-chain mode is not used."
},
{
"number": "24",
"name": "DGND",
"type": "power_in",
"description": "Buffer I/O ground; connect to the digital ground plane."
},
{
"number": "25",
"name": "DVDD",
"type": "power_in",
"description": "Buffer I/O supply, specified from 2.7 V to 5.5 V with 3.3 V nominal."
},
{
"number": "26",
"name": "DB7",
"type": "bidirectional",
"description": "Data bit 7 input/output; must be connected to DGND."
},
{
"number": "27",
"name": "DB6/SEL_B",
"type": "bidirectional",
"description": "Data bit 6 input/output; when low SDO_B is disabled and all eight channels are available only through SDO_A."
},
{
"number": "28",
"name": "DB5/SEL_CD",
"type": "bidirectional",
"description": "Data bit 5 input/output; selects SDO_C and SDO_D, with high placing channel pairs C and D on SDO_C and SDO_D."
},
{
"number": "29",
"name": "DB4",
"type": "bidirectional",
"description": "Data bit 4 input/output; connect to DGND."
},
{
"number": "30",
"name": "DB3/DCIN_A",
"type": "bidirectional",
"description": "Data bit 3 input/output; when DCEN = 1 it is the daisy-chain data input for SDO_A of the previous device, and when DCEN = 0 it is connected to DGND."
},
{
"number": "31",
"name": "DB2/DCIN_B",
"type": "bidirectional",
"description": "Data bit 2 input/output; when DCEN = 1 and SEL_B = 1 it is the daisy-chain data input for SDO_B, and when DCEN = 0 it is connected to DGND."
},
{
"number": "32",
"name": "DB1/DCIN_C",
"type": "bidirectional",
"description": "Data bit 1 input/output; when DCEN = 1 and SEL_CD = 1 it is the daisy-chain data input for SDO_C, and when DCEN = 0 it is connected to DGND."
},
{
"number": "33",
"name": "DB0/DCIN_D",
"type": "bidirectional",
"description": "Data bit 0 (LSB) input/output; when DCEN = 1 and SEL_CD = 1 it is the daisy-chain data input for SDO_D, and when DCEN = 0 it is connected to DGND."
},
{
"number": "34",
"name": "RANGE/XCLK",
"type": "bidirectional",
"description": "In hardware mode, low selects an input range of ±4 VREF and high selects ±2 VREF; in software mode it is an external or internal conversion clock pin, and it is connected to DGND if unused."
},
{
"number": "35",
"name": "BUSY/INT",
"type": "output",
"description": "Converter busy status output that goes high at conversion start and pulses low per channel pair completion, or an interrupt output when CONFIG bit C27 = 1."
},
{
"number": "36",
"name": "ASLEEP",
"type": "input",
"description": "Auto-sleep enable input; when high the device enters auto-sleep mode, which is recommended to save power at lower data rates."
},
{
"number": "37",
"name": "CONVST_A",
"type": "input",
"description": "Conversion start for channel pair A; its rising edge initiates simultaneous conversion of CH_A[1:0] and resets the internal channel state machine."
},
{
"number": "38",
"name": "CONVST_B",
"type": "input",
"description": "Conversion start for channel pair B; its rising edge initiates simultaneous conversion of CH_B[1:0]."
},
{
"number": "39",
"name": "CONVST_C",
"type": "input",
"description": "Conversion start for channel pair C; its rising edge initiates simultaneous conversion of CH_C[1:0]."
},
{
"number": "40",
"name": "CONVST_D",
"type": "input",
"description": "Conversion start for channel pair D; its rising edge initiates simultaneous conversion of CH_D[1:0]."
},
{
"number": "41",
"name": "HW/SW",
"type": "input",
"description": "Mode selection input; low selects hardware mode using external pins and high selects software mode configured through the CONFIG register."
},
{
"number": "42",
"name": "CH_A0",
"type": "passive",
"description": "Analog input of channel A0; channel A is the master pair that is always active and must run at the highest data rate when pairs use different rates."
},
{
"number": "43",
"name": "REFAP",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair A reference, to be connected to the decoupling capacitor."
},
{
"number": "44",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to the analog ground plane."
},
{
"number": "45",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, specified from 4.5 V to 5.5 V with 5.0 V nominal."
},
{
"number": "46",
"name": "REFAN",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair A reference, to be connected to the decoupling capacitor and AGND."
},
{
"number": "47",
"name": "CH_A1",
"type": "passive",
"description": "Analog input of channel A1; channel A is the master pair that is always active and must run at the highest data rate when pairs use different rates."
},
{
"number": "48",
"name": "HVDD",
"type": "power_in",
"description": "Positive supply voltage for the analog inputs, specified from 5.0 V to 16.5 V with 15.0 V nominal."
},
{
"number": "49",
"name": "CH_B0",
"type": "passive",
"description": "Analog input of channel B0; input range is set by the RANGE pin or CONFIG bit C23."
},
{
"number": "50",
"name": "REFBP",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair B reference, to be connected to the decoupling capacitor."
},
{
"number": "51",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to the analog ground plane."
},
{
"number": "52",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, specified from 4.5 V to 5.5 V with 5.0 V nominal."
},
{
"number": "53",
"name": "REFBN",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair B reference, to be connected to the decoupling capacitor and AGND."
},
{
"number": "54",
"name": "CH_B1",
"type": "passive",
"description": "Analog input of channel B1; input range is set by the RANGE pin or CONFIG bit C23."
},
{
"number": "55",
"name": "REFN",
"type": "passive",
"description": "Negative reference input/output; connect to a decoupling capacitor and AGND."
},
{
"number": "56",
"name": "REFIO",
"type": "bidirectional",
"description": "Reference voltage input/output whose value is set by the internal DAC through CONFIG bits C[9:0]; connect to a decoupling capacitor."
},
{
"number": "57",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, specified from 4.5 V to 5.5 V with 5.0 V nominal."
},
{
"number": "58",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to the analog ground plane."
},
{
"number": "59",
"name": "CH_C1",
"type": "passive",
"description": "Analog input of channel C1; input range is set by the RANGE pin or CONFIG bit C21."
},
{
"number": "60",
"name": "REFCN",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair C reference, to be connected to the decoupling capacitor and AGND."
},
{
"number": "61",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, specified from 4.5 V to 5.5 V with 5.0 V nominal."
},
{
"number": "62",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect to the analog ground plane."
},
{
"number": "63",
"name": "REFCP",
"type": "passive",
"description": "Decoupling capacitor input for the channel pair C reference, to be connected to the decoupling capacitor."
},
{
"number": "64",
"name": "CH_C0",
"type": "passive",
"description": "Analog input of channel C0; input range is set by the RANGE pin or CONFIG bit C21."
},
{
"number": "65",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet pin table lists 64 numbered pins for the RGC VQFN package but does not give a number f; Several pins have multiple functions depending on mode (for example DB pins, CS/FS, REFEN/WR, RANGE/; The datasheet pin table gives I/O codes AI, AIO, DI, DIO, DO and P. Analog inputs are mapped to pass"
],
"pages_sent": 15,
"cost_usd": 0.0542,
"at": "2026-11-05T22:36:00"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/ads8568.pdf",
"pages": 62,
"sha256": "79c029913ea9ce5c",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 65,
"described": 65,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ads8568srgcr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ads8568srgcr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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9,
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "2e7cef17b82124aaa82a7a4a5a71c007648d7c887ff86140d1a68100a8f71dd1",
"checked": "2026-11-05",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-64-EP(9x9)",
"Category": "ADC/DAC/Data Conversion",
"Pins": "65"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "79c029913ea9ce5ce0cae2fb12cd22e2598088ed5a58a6c6567062ffb7d9bb76",
"rows": [
{
"name": "HVDD to AGND supply voltage",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 18,
"conditions": "",
"source_page": 9,
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{
"name": "HVSS to AGND supply voltage",
"symbol": "",
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"min": -18,
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{
"name": "AVDD to AGND supply voltage",
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"max": 6,
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{
"name": "Input current to all pins except supply",
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